参数资料
型号: MCP629T-E/ML
厂商: Microchip Technology
文件页数: 23/66页
文件大小: 0K
描述: IC OPAMP GP RR 20MHZ W/CS 16QFN
标准包装: 3,300
系列: mCal 技术
放大器类型: 通用
电路数: 2
输出类型: 满摆幅
转换速率: 10 V/µs
增益带宽积: 20MHz
电流 - 输入偏压: 5pA
电压 - 输入偏移: 200µV
电流 - 电源: 2.5mA
电流 - 输出 / 通道: 70mA
电压 - 电源,单路/双路(±): 2.5 V ~ 5.5 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-VQFN 裸露焊盘
供应商设备封装: 16-QFN(4x4)
包装: 带卷 (TR)
2009-2011 Microchip Technology Inc.
DS22188C-page 3
MCP621/1S/2/3/4/5/9
1.0
ELECTRICAL CHARACTERISTICS
1.1
Absolute Maximum Ratings
VDD –VSS .......................................................................6.5V
Current at Input Pins ....................................................±2 mA
Analog Inputs (VIN+ and VIN–) . VSS – 1.0V to VDD +1.0V
All Other Inputs and Outputs ......... VSS – 0.3V to VDD +0.3V
Output Short Circuit Current ................................ Continuous
Current at Output and Supply Pins ..........................±150 mA
Storage Temperature ...................................-65°C to +150°C
Max. Junction Temperature ........................................ +150°C
ESD protection on all pins (HBM, MM)
................≥ 1 kV, 200V
Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional
operation of the device at those or any other
conditions above those indicated in the operational
listings of this specification is not implied. Exposure to
maximum rating conditions for extended periods may
affect device reliability.
1.2
Specifications
TABLE 1-1:
DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +2.5V to +5.5V, VSS = GND,
VCM = VDD/3, VOUT ≈ VDD/2, VL = VDD/2, RL = 2 kΩ to VL and CAL/CS =VSS (refer to Figure 1-2).
Parameters
Sym
Min
Typ
Max
Units
Conditions
Input Offset
Input Offset Voltage
VOS
-200
+200
V
After calibration (Note 1)
Input Offset Voltage Trim Step
Size
VOSTRM
—37
200
V
Input Offset Voltage Drift
ΔVOS/ΔTA
—±2.0
V/°C TA = -40°C to +125°C
Power Supply Rejection Ratio
PSRR
61
76
dB
Input Current and Impedance
Input Bias Current
IB
—5
pA
Across Temperature
IB
—100
pA
TA = +85°C
Across Temperature
IB
1700
5,000
pA
TA = +125°C
Input Offset Current
IOS
—±10
pA
Common Mode Input
Impedance
ZCM
—1013||9
Ω||pF
Differential Input Impedance
ZDIFF
—1013||2
Ω||pF
Common Mode
Common Mode Input Voltage
Range
VCMR
VSS 0.3
VDD 1.3
V
Common Mode Rejection Ratio
CMRR
65
81
dB
VDD = 2.5V, VCM = -0.3 to
1.2V
CMRR
68
84
dB
VDD = 5.5V, VCM = -0.3 to
4.2V
Open-Loop Gain
DC Open-Loop Gain
(large signal)
AOL
88
117
dB
VDD = 2.5V,
VOUT = 0.3V to 2.2V
AOL
94
126
dB
VDD = 5.5V,
VOUT = 0.3V to 5.2V
Note 1:
Describes the offset (under the specified conditions) right after power-up, or just after the CAL/CS pin is
toggled. Thus, 1/f noise effects (an apparent wander in VOS; see Figure 2-35) are not included.
2:
Increment between adjacent VOS trim points; Figure 2-3 shows how this affects the VOS repeatability.
3:
See Figure 2-6 and Figure 2-7 for temperature effects.
4:
The ISC specifications are for design guidance only; they are not tested.
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