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| 型号： | MCZ33784EFR2 |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 5/30页 |
| 文件大小： | 0K |
| 描述： | IC SENSOR DBUS DSI 2.02 16-SOIC |
| 标准包装： | 2,500 |
| 类型： | 传感器接口 |
| 输入类型： | 模拟 |
| 输出类型： | 数字 |
| 接口： | 总线 |
| 电流 - 电源： | 4mA |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-SOIC N |
| 包装： | 带卷 (TR) |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
13
33784
FUNCTIONAL DESCRIPTION
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
BUS SWITCHES
A high side bus switch lies between BUSIN and BUSOUT
and a low side bus switch lies between RTNIN and RTNOUT.
These switches can be opened or closed via commands on
the bus. The bus switch facilitates the daisy chain operation
of the 33784. When the switch is open, BUSIN is isolated
from BUSOUT, RTNIN is isolated from RTNOUT, and any
communication that is seen on one pin will not be transmitted
to the other. In this way, the CCU can initialize the first 33784
or any other slave device in the daisy chain and program an
address into it.
Once the first device in the daisy chain is initialized, the
bus switches can be closed, effectively shorting BUSIN to
BUSOUT, and RTNIN to RTNOUT. Now all communication
that is seen on one pin will be passed to the other. The Master
IC can send a command through the initialized device to the
next un-initialized device in the daisy chain. The process is
repeated until every device in the daisy chain has been
initialized with a unique address.
Once a device’ bus switches are closed they remain
closed except for the following conditions:
- reception of a CLEAR command
- bus lines remain below the frame threshold for longer
than the bus timeout period in which case the device will reset
and the bus switches will open.
- HCAP or VREG decay below the POR threshold for a time
exceeding the POR Mask time in which case the device will
reset and the bus switches will open.
Once the bus switches open they can only be closed again
with an initialization command.
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