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| 型号： | MCZ33937EKR2 |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 29/48页 |
| 文件大小： | 0K |
| 描述： | IC PRE-DRIVER 3PHASE 54-SOIC |
| 标准包装： | 1,000 |
| 系列： | SMARTMOS™ |
| 配置： | 3 相桥 |
| 输入类型： | 非反相 |
| 延迟时间： | 265ns |
| 电流 - 峰： | 600mA |
| 配置数： | 1 |
| 输出数： | 3 |
| 高端电压 - 最大（自引导启动）： | 15V |
| 电源电压： | 8 V ~ 40 V |
| 工作温度： | -40°C ~ 135°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 54-BSSOP（0.295"，7.50mm 宽）裸露焊盘 |
| 供应商设备封装： | 54-SOICW-EP |
| 包装： | 带卷 (TR) |
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FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
RESET AND ENABLE
The 33937A has three power modes of operation
described in Table 5 . There are three global control inputs
(RST, EN1, EN2), which together with the status of VDD, VLS
and DESAT/PHASE faults control the behavior of the IC.
The operating status of the IC can be described by the
following five modes:
? Sleep Mode - When RST is low, the IC is in Sleep
mode. The current consumption of the IC is at minimum.
? Standby Mode - The RST input is high while one of the
Enable inputs is low. The IC is fully biased up and
operating, all the external FETs are actively turned off
by both High Side and Low Side gate drives. The IC is
ready to enter the Enable Mode.
Table 5. Functions of RST, EN1 and EN2 Pins
? Initialization Mode - When EN1, EN2 and RST all go
high, the device enters the Initialization Mode. Toggling
the LS and then the HS initializes the driver and normal
operation in the Enable Mode begins. (See Initialization
Requirements on page 40)
? Enable Mode - After initialization is complete, the
device goes into the Enable Mode and operates
normally. Normal operation continues in this mode as
long as both enable pins and RST are high.
? Fault Protection Mode - If a protective fault occurs
(either Desat/Phase or VLS UV) the device enters a
Fault Protection Mode. After a fault clears, the device
requires initialization again before resuming normal
Enable Mode operation.
RST
0
1
1
EN1, EN2
xx
0x
x0
11
Mode of Operation (Driver Condition)
Sleep Mode - in this mode (low quiescent current) the driver output stage is switched-off with a weak pull-down. All error
and SPI registers are cleared. The internal 5.0 V regulator is turned off and VDD is pulled low. All logic outputs except
SO are clamped to VSS.
Standby Mode - IC fully biased up and all functions are operating, the output drivers actively turn off all of the external
FETs (after initialization). The SPI port is functional. Logic level outputs are driven with low-impedance. SO is high-
impedance unless CS is low. V DD , Charge Pump and V LS regulators are all operating. The IC is ready to move to Enable
Mode.
Initialization Mode - Low Side Drivers are enabled, SPI is fully operational. Ready for initialization (See Initialization
Requirements on page 37 ).
Enable Mode - (normal operation). Drivers are enabled; output stages follow the input command. After Enable, outputs
require a pulse on Px_LS before corresponding HS outputs will turn on in order to charge the bootstrap capacitor. All
error pin and register bits are active if detected.
Fault Protection Mode - Drivers are turned OFF or disabled per the fault and protection mode registers. Recovery
requires initialization (See Initialization Requirements on page 37 ).
Table 6. Functional Ratings
( T J = -40 °C to 150 °C and supply voltage range V SUP = V PWR = 5.0 to 45 V, C = 0.47 μF)
Characteristic
Default State of input pin Px_LS, EN1, EN2, RST, SI, SCLK, if left open (57)
(Driver output is switched off, high-impedance mode)
Default State of input pin Px_HS, CS if left open (57)
Value
Low (<1.0 V)
High (>2.0 V)
(Driver output is switched off, high-impedance mode)
Notes
57. To assure a defined status for all inputs, these pins are internally biased by pull-up/down current sources.
33937A
Analog Integrated Circuit Device Data
Freescale Semiconductor
29
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