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参数资料
| 型号： | MCZ34702EWR2 |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 22/39页 |
| 文件大小： | 0K |
| 描述： | IC PWR SUPPLY 3A SW 32-SOIC |
| 标准包装： | 1,000 |
| 应用： | 控制器，电源 QUICC? I、II |
| 输入电压： | 2.8 V ~ 6 V |
| 输出数： | 2 |
| 输出电压： | 7.75V，0.8 V ~ 6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 32-SOIC |
| 包装： | 带卷 (TR) |
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FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
THERMAL SHUTDOWN
To increase the overall safety of the system designed with
the 34702, an internal thermal shutdown function has been
incorporated into the switching regulator circuit. The 34702
senses the temperature of the buck regulator main switching
MOSFET (high side MOSFET M1; see Figure 2 on page 2 ),
the low side (synchronous MOSFET M2), and control circuit.
If the temperature of any of the monitored components
exceeds the limit of safe operation (thermal shutdown), the
switching regulator and the LDO shut down. After the
temperature falls below the value given by the thermal
shutdown hysteresis window, the switcher tries again to
operate.
POWER SEQUENCING MODES
The power sequencing of the two outputs of this power
supply IC is in compliance with the Freescale Power QUICC
and other 32-bit microprocessor requirements. When the
input voltage is applied, the switcher and linear regulator
outputs follow the supply rail voltage during power-up and
power-down in the limits given by the microcontroller power
sequencing specification, illustrated in Figures 17 through
Standard and Inverted, as explained in more detail below.
The third mode of operation is Power Sequencing Disabled.
3.3 V Input
The V OUT pull-down MOSFET M3 has an independent
thermal shutdown control. If the M3 temperature exceeds the
thermal shutdown limit, the M3 is turned off without affecting
the switcher operation.
VIN2
VBD
34702
VIN1
LDRV
2.5 V
Other
Circuits
The LDO pull-down MOSFET M4 has an independent
thermal shutdown control. If the M4 temperature exceeds the
thermal shutdown limit, the M4 will be turned off without
affecting the LDO operation.
VBST
RT
ADDR
CS
LDO
LFB
3.3 V
VDDL (Core)
SDA
MCU
SOFT START
SCL
GND
RST
A switching regulator soft start feature is incorporated in
the 34702. The soft start is active each time the IC is enabled,
VIN is reapplied, or after a fault retry. Other transient events
do not activate the soft start.
Optional
EN1
EN2
CLKSYN
CLKSEL
FREQ
BOOT
SW
VOUT
PGND
INV
VBST
1.5 V
VDDH (I/Os)
VOLTAGE MARGINING
VDDI
The 34702 includes a voltage margining feature accessed
through the I 2 C bus. Voltage margining allows for
independent adjustment of the Switcher V OUT voltage and
3.3 V Input Supply (I/O Voltage)
? V = 2.1 V
Max. Lead
the linear output V LDO . Each can be adjusted up and down
in 1.0% steps to a range of ±7.0%. This feature allows for
worst case system validation; i.e., determining the design
margin. Margining details are described in the section entitled
1.8V Start-Up
Slope
1.0 V/ms
(typ.)
1.5 V Core Voltage
? V = 2.1 V
Max. Lead
? V = 0.4 V
Max. Lag
Figure 17. Standard Power-up / Down Sequence
in +3.3V Supply System
34702
Analog Integrated Circuit Device Data ?
22
Freescale Semiconductor
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