参数资料
型号: MD2202-D96-V3-X
厂商: SANDISK CORP
元件分类: 存储控制器/管理单元
英文描述: FLASH MEMORY DRIVE CONTROLLER, PDIP32
封装: DIP-32
文件页数: 19/29页
文件大小: 323K
代理商: MD2202-D96-V3-X
DiskOnChip 2000 DIP
8.3.2
Write Cycle Timing
CE#
T
W(WE)
OE#
WE#
A[0..12]
T
HO(A)
T
SU(A)
T
HO(CE1)
T
HO(CE0)
T
SU(D)
T
HO(D)
T
REC
T
HO(CE0)
T
SU(CE1)
D[0..7]
Figure 10: Write Cycle
Table 9: Write Cycle Timing
3.3V
5V
Symbol
Description
Min (ns)
Max (ns)
Min (ns)
Max (ns)
Notes
TSU(A)
Address to WE#
setup time
0
10
THO(A)
WE#
to Address hold time
35
56
TW(WE)
WE# asserted width
62
98
TSU(CE0)
CE#
to WE#
setup time
0
1
THO(CE0)
WE#
to CE# = 0 hold time
0
2
THO(CE1)
OE# or WE#
to CE# = 1 hold time
8
42
TSU(CE1)
CE#
to WE# or OE#
setup time
8
42
TREC
WE#
to start of next cycle
22
59
TSU(D)
D to WE#
setup time
50
48
THO(D)
WE#
to D hold time
0
40
1.
CE# may be asserted any time before or after WE# is asserted. If CE# is asserted after WE#, all timing relative to WE# asserted will be
referenced instead to the time CE# was asserted.
2.
CE# may be negated any time before or after WE# is negated. If CE# is negated before WE#, all timing relative to WE# negated will
be referenced instead to the time CE# was negated.
26
Data Sheet, Rev. 3.9
91-SR-002-42-8L
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