参数资料
型号: MIC2183YQS TR
厂商: Micrel Inc
文件页数: 3/12页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 16-QSOP
标准包装: 2,500
PWM 型: 电流模式
输出数: 1
频率 - 最大: 440kHz
占空比: 100%
电源电压: 2.9 V ~ 14 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
包装: 带卷 (TR)
其它名称: MIC2183YQSTR
MIC2183YQSTR-ND
MIC2183
Pin Description
Micrel, Inc.
Pin Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin Name
VINA
FreqOut
SS
COMP
SGND
FB
EN/UVLO
CSL
CSH
VDD
SYNC
PGND
OUTN
OUTP
FREQ/2
VINP
Pin Function
Analog voltage input voltage to the circuit. This powers up the analog
sections of the die and does not need to be the same voltage as Pin 16
(V IN P).
This provides a digital signal output signal at half the switching frequency.
This signal swings from 0 to 3V, and can be used to drive an external
capacitive doubler to provide a higher voltage to the V IN P input.
Soft start reduces the inrush current and delays and slows the output voltage
rise time. A 5 μ A current source will charge the capacitor up to V DD . A 1 μ F
capacitor will soft start the switching regulator in 1.5ms.
Compensation (Output): Internal error amplifier output. Connect to a
capacitor or series RC network to compensate the regulator’s control loop.
Small signal ground: must be routed separately from other grounds to the (-)
terminal of C OUT .
Feedback Input - the circuit regulates this pin to 1.245V.
Enable/UnderVoltage Lockout (input): A low level on this pin will power down
the device, reducing the quiescent current to under 5uA. This pin has two
separate thresholds, below 1.5V the output switching is disabled, and below
0.9V the part is forced into a complete micropower shutdown. The 1.5V
threshold functions as an accurate undervoltage lockout (UVLO) with 140mV
hysteresis.
The (-) input to the current limit comparator. A built in offset of 100mV
between CSH and CSL in conjunction with the current sense resistor sets
the current limit threshold level. This is also the (-) input to the current
amplifier.
The (+) input to the current limit comparator. A built in offset of 100mV
between CSH and CSL in conjunction with the current sense resistor sets
the current limit threshold level. This is also the (+) input to the current
amplifier.
3V internal linear-regulator output. V DD is also the supply voltage bus for the
chip. Bypass to SGND with 1 μ F.
Frequency Synchronization (Input): Connect an external clock signal to
synchronize the oscillator. Leading edge of signal above 1.5V starts the
switching cycle. Connect to SGND if not used.
MOSFET driver power ground, connects to source of synchronous MOSFET
and the (-) terminal of CIN.
High current drive for synchronous N channel MOSFET. Voltage swing is
from ground to V INP . On-resistance is typically 5 ? .
High current drive for high side P channel MOSFET. Voltage swing is from
ground to V IN P. On-resistance is typically 5 ? .
When this is low, the oscillator frequency is 400KHz. When this pin is raised
to V DD , the oscillator frequency is 200KHz.
Power Input voltage to the circuit. The output gate drivers are powered from
this supply. The current sense resistor R CS should be connected as close as
possible to this pin.
April 2005
3
M9999-042205
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