参数资料
| 型号： | MIC2199BML TR |
| 厂商： | Micrel Inc |
| 文件页数： | 7/14页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 12-MLF |
| 标准包装： | 5,000 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 330kHz |
| 占空比： | 85% |
| 电源电压： | 4.5 V ~ 32 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 12-VFDFN 裸露焊盘，12-MLF? |
| 包装： | 带卷 (TR) |
| 其它名称： | MIC2199BMLTR MIC2199BMLTR-ND |
R CS =
I OUT(max) =
Micrel, Inc.
Current Limit
The MIC2199 output current is detected by the voltage drop
across the external current-sense resistor (R CS in Figure
2.). The current limit threshold is 75mV±20mV. The current-
sense resistor must be sized using the minimum current
limit threshold. The external components must be designed
to withstand the maximum current limit. The current-sense
resistor value is calculated by the equation below:
55mV
I OUT(max)
The maximum output current is:
95mV
R CS
The current-sense pins CSH (pin 4) and V OUT (pin 5) are
noise sensitive due to the low signal level and high input im-
pedance. The PCB traces should be short and routed close
to each other. A small (1nF to 0.1μF) capacitor across the
pins will attenuate high frequency switching noise.
When the peak inductor current exceeds the current limit
threshold, the current limit comparator, in Figure 2, turns off
the high-side MOSFET for the remainder of the cycle. The
output voltage drops as additional load current is pulled from
the converter. When the output voltage reaches approximately
0.4V, the circuit enters frequency-foldback mode and the
oscillator frequency will drop to 75kHz while maintaining the
peak inductor current equal to the nominal 75mV across the
external current-sense resistor. This limits the maximum output
power delivered to the load under a short circuit condition.
MIC2199.
MOSFET Gate Drive
The MIC2199 high-side drive circuit is designed to switch
an N-Channel MOSFET. Referring to the block diagram in
Figure 2, a bootstrap circuit, consisting of D2 and C BST , sup-
plies energy to the high-side drive circuit. Capacitor C BST is
charged while the low-side MOSFET is on and the voltage on
the V SW pin (pin 11) is approximately 0V. When the high-side
MOSFET driver is turned on, energy from C BST is used to
turn the MOSFET on. As the MOSFET turns on, the voltage
on the V SW pin increases to approximately V IN . Diode D2
is reversed biased and C BST floats high while continuing to
keep the high-side MOSFET on. When the low-side switch
is turned back on, C BST is recharged through D2.
The drive voltage is derived from the internal 5V V DD bias
supply. The nominal low-side gate drive voltage is 5V and
the nominal high-side gate drive voltage is approximately
4.5V due the voltage drop across D2. A fixed 80ns delay
between the high- and low-side driver transitions is used
to prevent current from simultaneously flowing unimpeded
through both MOSFETs.
Oscillator
The internal oscillator is free running and requires no external
components. The nominal oscillator frequency is 500kHz. If
the output voltage is below approximately 0.4V, the oscillator
operates in a frequency-foldback mode and the switching
frequency is reduced to 75kHz.
Reference, Enable and UVLO Circuits
The output drivers are enabled when the following conditions
are satisfied:
? The V DD voltage (pin 7) is greater than its under-
voltage threshold (typically 4.25V).
? The voltage on the enable pin is greater than the
enable UVLO threshold (typically 2.5V).
f S = 75kHz
V OUT = 0.4V
f S = 300kHz
The internal bias circuit generates a 0.8V bandgap reference
voltage for the voltage error amplifier and a 5V V DD voltage
for the gate drive circuit. The MIC2199 uses FB (pin 3) for
output voltage sensing.
The enable pin (pin 2) has two threshold levels, allowing
the MIC2199 to shut down in a low current mode, or turn off
output switching in UVLO mode. An enable pin voltage lower
than the shutdown threshold turns off all the internal circuitry
and reduces the input current to typically 0.1μA.
If the enable pin voltage is between the shutdown and UVLO
thresholds, the internal bias, V DD , and reference voltages are
turned on. The output drivers are inhibited from switching and
remain in a low state. Raising the enable voltage above the
UVLO threshold of 2.5V enables the output drivers.
Either of two UVLO conditions will disable the MIC2199 from
switching.
? When the V DD drops below 4.1V
? When the enable pin drops below the 2.5V threshold
V IN = 7V
V OUT = 3.3V
TIME
Figure 4. Startup Waveform
Above 0.4V, the switching frequency increases to 500kHz
causing the output voltage to rise a greater rate. The rise
time of the output is dependent on the output capacitance,
output voltage, and load current. The oscilloscope photo in
Figure 4 show the output voltage at startup.
January 2010
7
M9999-011310
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