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参数资料
| 型号： | MIC2341-2YTQ TR |
| 厂商： | Micrel Inc |
| 文件页数： | 19/32页 |
| 文件大小： | 1277K |
| 描述： | IC HOT PLUG CTLR DUAL PCI 48TQFP |
| 标准包装： | 2,000 |
| 类型： | 热交换控制器 |
| 应用： | 通用型，PCI Express? |
| 内部开关： | 无 |
| 电流限制： | 可调 |
| 电源电压： | 3.3V，12V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-TQFP |
| 供应商设备封装： | 48-TQFP（7x7） |
| 包装： | 带卷 (TR) |
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Micrel, Inc.
MIC2341/2341R
October 2007
19
M9999-102507-A
(408) 944-0800
ISSP
T[A/B])
LOAD(12VOU
K)
GATE(12VSN
T[A/B])
LOAD(12VOU
B]
12VGATE[A/
OUT[A/B])
INRUSH(12V
C
C
I
C
dt
dV
I
?/DIV>
=
?/DIV>
=
For the same p-channel power MOSFET in the previous
example, if C
ISSP
= 1700pF and C
LOAD(12VOUT[A/B])
=
100礔, the 12VOUT[A/B] inrush current charging this
load capacitance is:
1.47A
1700pF
100礔
25礎
I
OUT[A/B])
INRUSH(12V
=
?/DIV>
=
Calculating the 12VOUT[A/B] voltage rate-of-change for
a given capacitive load can be determined by the
following expression:
T[A/B])
LOAD(12VOU
OUT[A/B])
INRUSH(12V
]
12VOUT[A/B
C
I
dt
dV
=
and, using the same quantities in the current example, is
given by:
ms
V
14.7
F
100
A
1.47
dt
dV
]
12VOUT[A/B
=
=
?/DIV>
To determine (to first-order) the time point at which the
12VOUT[A/B] voltage crosses its corresponding output
Power Good threshold, the following equation can be
used:
0.72ms
ms
V
14.7
10.53V
dt
dV
V
V
t
]
12VOUT[A/B
HYSPG
UVTH(12V)
UT[A/B])
PWRGD(12VO
H
=
+
=
To determine 3VGATE[A/B] pin voltage slew rates,
inrush currents, 3VOUT[A/B] output voltage slew rates,
and time to assert its corresponding internal Power
Good flag into capacitive loads connected to
3VOUT[A/B], simple computations can be made using
the same equations by substituting I
GATE(3VCHARGE)
for
I
GATE(12VSINK)
, C
ISSN
(the input gate capacitance of an N-
channel power MOSFET) for C
ISSP
, C
LOAD(3VOUT[A/B])
for
C
LOAD(12VOUT[A/B])
, I
INRUSH(3VOUT[A/B])
for I
INRUSH(12VOUT[A/B])
,
and V
UVTH(3V)
for V
UVTH(12V)
.
For example, if a Si4420BDY n-channel power MOSFET
is used with the MIC2341 to control inrush currents at
3VOUT[A/B], its C
ISSN
is approximately 4100pF at V
DS
=
3V. The 3VGATE[A/B] pin voltage rate of change is
given by:
ms
V
6.1
4100pF
25?
C
I
dt
dV
ISSN
RGE)
GATE(3VCHA
]
3VGATE[A/B
=
=
=
Assuming a 300-礔 capacitive load, the 3VOUT[A/B]
inrush current charging this load capacitance is given by:
A
1.82
4100pF
300?
25?
UT[A/B])
INRUSH(3VO
I
=
?/DIV>
=
The 3VOUT[A/B] output voltage slew rate is given by:
ms
V
6.1
F
300
A
1.82
dt
dV
3VOUT[A/B]
H
=
?/DIV>
and the time to assert the internal 3VOUT[A/B] Power
Good flag is given by:
ms
0.45
ms
V
6.1
2.77V
dt
dV
V
V
t
3VOUT[A/B]
HYSPG
UVTH(3V)
T[A/B])
PWRGD(3VOU
H
=
+
=
Mode 2: Charging 12VOUT and 3VOUT Capacitive
Loads in Current Limit
In x4 and x8 PCI Express applications, capacitive loads
at 12VOUT[A/B] and 3VOUT[A/B] can be as large as
1000礔. As a result, the inrush load charging currents at
start-up can be large enough to cause a voltage drop
across the external sense resistor larger than 50mV. In
these applications, internal servo circuits at
12VGATE[A/B] and 3VGATE[A/B] modulate the drive to
the gates of their corresponding power MOSFETs to
regulate the load current to:
/B]
12VSENSE[A
/B]
12VSENSE[A
THLIMIT
UT[A/B])
LIMIT(12VO
R
mV
50
R
V
I
=
=
In the typical application circuit, the external sense
resistor connected between 12VIN[A/B] and
12VSENSE[A/B] pins was selected to be 20m&. The
regulated current charging the load capacitance at
12VOUT[A/B] is given by:
A
2.5
m
20
mV
50
I
UT[A/B])
LIMIT(12VO
=
&
=
Once current-regulation control is activated, the circuit
breakers t
FLT
timer is also activated to protect the
external power MOSFET against potentially excessive
power dissipation. For additional information on this
timer and the MIC2341s circuit breaker operation,
please consult the section labeled Circuit Breaker
Function. The output voltage rate of change at
12VOUT[A/B] during current limit charging into a 1000礔
capacitive load is given by:
ms
V
2.5
F
1000
A
2.5
C
I
dt
dV
T[A/B])
LOAD(12VOU
UT[A/B])
LIMIT(12VO
]
12VOUT[A/B
=
=
=
?/DIV>
In this fashion, the inrush current is controlled and the
load capacitance is charged up slowly during the start-up
cycle. The gate drive circuits will maintain control of the
inrush current until the 12VOUT[A/B] or 3VOUT[A/B]
voltages have reached their corresponding Power
Good thresholds (V
UVTH(12V)[A/B]
or V
UVTH(3V)[A/B]
,
respectively) at which time the inrush current
approaches its nominal steady-state level, the voltage
across the external sense resistor drops below the circuit
breakers V
THLIMIT
threshold, and the corresponding
internal Power-is-Good flag is asserted. For the
12VOUT[A/B] example, its internal Power-is-Good flag
is asserted at:
ms
4.2
ms
V
2.5
10.53V
dt
dV
V
V
t
]
12VOUT[A/B
HYSPG
UVTH(12V)
UT[A/B])
PWRGD(12VO
H
=
+
=
Calculating the current limit for charging the 3VOUT[A/B]
load capacitance, the output voltage slew rate at
3VOUT[A/B], and when the internal 3VOUT[A/B] Power
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| MIC2342-2YTQ | 功能描述:热插拔功率分布 Dual -Slot PCI Express Hot-Plug Controller RoHS:否 制造商:Texas Instruments 产品:Controllers & Switches 电流限制: 电源电压-最大:7 V 电源电压-最小:- 0.3 V 工作温度范围: 功率耗散: 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Tube |
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