参数资料
型号: MIC2341-2YTQ TR
厂商: Micrel Inc
文件页数: 23/32页
文件大小: 1277K
描述: IC HOT PLUG CTLR DUAL PCI 48TQFP
标准包装: 2,000
类型: 热交换控制器
应用: 通用型,PCI Express?
内部开关:
电流限制: 可调
电源电压: 3.3V,12V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 48-TQFP
供应商设备封装: 48-TQFP(7x7)
包装: 带卷 (TR)
Micrel, Inc.
MIC2341/2341R
 
 
October 2007 
23
M9999-102507-A
 (408) 944-0800
 
 
Figure 7. MIC2341R Auto-Retry Timing Diagram and Operation in Current-limit
 
 
 
Thermal Shutdown
The internal VAUX[A/B] MOSFETs are protected against
damage   not   only   by   current   limiting,   but   by
overtemperature   protection   as   well.   Should   an
overcurrent condition on either VAUX[A] or VAUX[B]
raise the junction temperature of the MIC2341 to 140癈,
all of the outputs for that corresponding slot (including
VAUX) will be shut off and that slots /FAULT_AUX
output will be asserted. The slots /FAULT_MAIN output
will not be asserted. The other slots operating condition
will remain unaffected. However, should the MIC2341s
die   temperature   exceed   160癈   because   of   an
overcurrent fault condition on both VAUX[A] and
VAUX[B], both slots (all outputs, including VAUXA and
VAUXB)   will   be   shut   off.   In   this   case,   both
/FAULT_AUX[A/B] output signals will be asserted; the
/FAULT_MAIN[A/B] output signals will not be asserted.
Plug-in Card Retention Switch Inputs
Two pins on the MIC2341 are available for use as card
retention switch inputs, /CRSW[A/B]. These pins are
internally pulled-up by 45k& resistors to VSTBY and
prevent the enabling of all gate drive circuits on
12GATE[A/B], 3VGATE[A/B], and VAUX[A/B] unless
these input pins are asserted LOW. In addition, each of
these inputs exhibits an internal debounce delay time of
approximately 10ms.
/FORCE_ON[A/B] Inputs
These level sensitive, asserted active-low digital inputs
are internally pulled up to VSTBY through a weak
current source and are intended for diagnostics during
the debug phase of the system design involving the
MIC2341. In asserting /FORCE_ON[A/B] LOW, all three
of the respective slots outputs (+12V, +3.3V, and VAUX)
will turn on. However, all protections for those outputs
are disabled. This explicitly includes all overcurrent and
short circuit protections, and on-chip thermal protection
for the VAUX supplies. Additionally, asserting a slots
/FORCE_ON[A/B] input will disable all of its input and
output UVLO protections, with the sole exception of that
asserting either or both of the /FORCE_ON[A/B] inputs
will not disable the VSTBY[A/B] input UVLO.
Asserting   /FORCE_ON[A/B]   LOW   will   cause   the
respective slots /PWRGD[A/B], and /DLY_PWRGD[A/B]
output   signals   to   be   asserted   LOW   while   the
/FAULT_MAIN[A/B], the /FAULT_AUX[A/B}, the /INT,
and the SYSPWRGD output signals to enter their open-
drain state.
/PWRGD[A/B] and /DLY_PWRGD Digital Outputs
The MIC2341 has two /PWRGD outputs and two
/DLY_PWRGD outputs, one for each slot. These are
open-drain, active-low outputs that are activated after
power-on-reset and are normally connected by an
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