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March 2005
17
M9999-033105
MIC2591B
Micrel
Figure 6. Input Pin Conguration for Disabling HPI/SMI Control
Functional Description
Hot Swap Insertion
When circuit boards are inserted into systems carrying live
supply voltages (“hot-plugged”), high inrush currents often
result due to the charging of bulk capacitance that resides
across the circuit board’s supply pins. This transient inrush
current can cause the system’s supply voltages to temporarily
go out of regulation, causing data loss or system lock-up. In
more extreme cases, the transients occurring during a hot-
plug event may cause permanent damage to connectors or
on-board components.
The MIC2591B addresses these issues by limiting the in-
rush currents to the load (PCI Express Board), and thereby
controlling the rate at which the load’s circuits turn-on. In
addition to this inrush current control, the MIC2591B offers
input and output voltage supervisory functions and current
limiting to provide robust protection for both the system and
circuit board.
System Interface
The MIC2591B employs two system interfaces: the hard-
ware Hot-Plug Interface (HPI) and the System Management
Interface (SMI). The HPI includes ON[A/B], AUXEN[A/B],
as well as /FAULT[A/B]; the SMI consists of SDA, SCL,
and /INT, whose signals conform to the levels and timing of
the SMBus specication. The MIC2591B can be operated
exclusively from the SMI, or can employ the HPl for power
control while continuing to use the SMI for access to all but
the power control registers.
InadditiontothebasicpowercontrolfeaturesoftheMIC2591B
accessible by the HPI, the SMI also gives the host access to
the following information from the part:
Output voltage and current from each supply.
Fault conditions occurring on each supply.
GPI_[A0/B0] pin status.
When using the System Management Interface for power
control, do not use the Hot-Plug Interface. Conversely, when
using the Hot-Plug Interface for power control, do not execute
power control commands over the System Management
Interface bus (all other register accesses via the SMI bus
remain permissible while in the HPI control mode). When
utilizing the SMI exclusively, the HPI input pins (ON[A/B],
AUXEN[A/B], and /FORCE_ON[A/B] should be congured
as shown below in Figure 6 (Disabling HPI when SMI control
is used). This conguration safeguards the power slots in the
event that the SMBus communication link is disconnected
for any reason.
Additionally, when utilizing the HPI exclusively, the SMBus
(or SMI) will be inactive if the input pins (SDA, SCL, A0, A1,
andA2) are congured as shown in Figure 6 below (Disabling
SMI when HPI Control is used).
Power Stability and Power-On Reset
The MIC2591B utilizes VSTBY[A/B] as the main supply input
source. VSTBY[A/B] is required for proper operation of the
MIC2591B’s SMBus and registers and must be applied at
all times. To ensure that the MIC2591B controller operates
properly, the VSTBY input must be stable and remain above
STBY
the undervoltage lockout (UVLO) threshold once applied.
Sufcient input bulk capacitance should be used to prevent
the supply from "drooping", causing VSTBY[A/B] to fall below
the UVLO threshold. Also, decoupling capacitors should be
placed at each of the MIC2591B inputs in order to lter high
frequency noise transients.
VSTBY must be the rst supply input applied followed by the
STBY
MAIN supply inputs of 12VIN and 3VIN. A Power-On Reset
(POR) cycle is initiated after VSTBY[A/B] rises above its
UVLO threshold and remains valid at that voltage for 250s.
All internal registers are cleared after POR. If VSTBY[A/B] is
recycled, the MIC2591B enters a new power-on-reset cycle.
The SMBus is ready for access at the end of the POR cycle
(250s after VSTBY[A/B] is valid). During tPOR, all outputs
remain off. In most applications, the total POR interval will
consist of the time required to charge the VSTBY input (by-
STBY
pass) capacitance to the UVLO threshold plus the internal
tPOR. The following equation is used to approximate the total
POR interval:
tPOR_TOTAL(S) =
CSTBY(F) VULVO(STBY)
ICHARGE(STBY)(A)
tPOR(S)
10 6
where CSTBYis the V
STBY
STBY input bulk bypass capacitance and
STBY
ICHARGE(STBY) is the current supplied by the VSTBY source
STBY
to charge the capacitance.
CHARGE(STBY)
Power-Up Cycle
Enabling the GATE output
When a slot's MAIN supplies are off, the 12VGATE pin is held
high with an internal pull-up. Similarly, the 3VGATE pin is
internally held low. When the MAIN supplies of the MIC2591B
MIC2591B
A2
/INT
SDA
SCL
A0
VSTBY
A1
100k
47
48
37
39
40
41
100k
Disabling SMI when
HPI Control is used
Disabling HPI when
SMI Control is used
100k
/INT
/FORCE_ONB
100k
/FORCE_ONA
AUXENA
AUXENB
ONA
ONB
MIC2591B
9
28
45
42
44
43