参数资料
型号: MIC4102YM
厂商: Micrel Inc
文件页数: 10/17页
文件大小: 0K
描述: IC DRIVER MOSFET 100V TTL 8SOIC
标准包装: 95
配置: 半桥
输入类型: PWM
延迟时间: 30ns
电流 - 峰: 2A
配置数: 1
输出数: 2
高端电压 - 最大(自引导启动): 118V
电源电压: 9 V ~ 16 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 管件
产品目录页面: 1109 (CN2011-ZH PDF)
其它名称: 576-1184
Micrel, Inc.
Vdd
MIC4102
A low power, high speed, level shifting circuit isolates the
low side (VSS pin) referenced circuitry from the high-
LS
Drive
Signal
LO
External
FET
side (HS pin) referenced driver. Power to the high-side
driver and UVLO circuit is supplied by the bootstrap
circuit while the voltage level of the HS pin is shifted
high.
The bootstrap circuit consists of an internal diode and
external capacitor, C B . In a typical application, such as
the synchronous buck converter shown in Figure 4, the
HS pin is at ground potential while the low-side MOSFET
Vss
Figure 2. Low-Side Driver Block Diagram
High-Side Driver and Bootstrap Circuit
A block diagram of the high-side driver and bootstrap
circuit is shown in Figure 3. This driver is designed to
is on. The internal diode allows capacitor C B to charge
up to V DD -V D during this time (where V D is the forward
voltage drop of the internal diode). After the low-side
MOSFET is turned off and the HO pin turns on, the
voltage across capacitor C B is applied to the gate of the
upper external MOSFET. As the upper MOSFET turns
on, voltage on the HS pin rises with the source of the
high-side MOSFET until it reaches V IN . As the HS and
HB pin rise, the internal diode is reverse biased
preventing capacitor C B from discharging.
drive a floating N-channel MOSFET, whose source
terminal is referenced to the HS pin.
Vdd
HB
C B
Vin
C VDD
Level
shift
HO
Q1
Lout
Vout
Vdd
HB
PWM
Q
FF
HS
Q2
Cout
_
Q
LO
C B
HO
External
FET
Vss
Figure 4. High-Side Driver and Bootstrap Circuit
HS
Figure 3. High-Side Driver Block Diagram
November 2006
10
M9999-112806
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