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参数资料
| 型号： | MIC5018YM4 TR |
| 厂商： | Micrel Inc |
| 文件页数： | 5/8页 |
| 文件大小： | 0K |
| 描述： | IC DRIVER MOSFET HI SIDE SOT143 |
| 标准包装： | 1 |
| 系列： | IttyBitty® |
| 配置： | 高端 |
| 输入类型： | 非反相 |
| 延迟时间： | 750µs |
| 配置数： | 1 |
| 输出数： | 1 |
| 电源电压： | 2.7 V ~ 9 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | TO-253-4，TO-253AA |
| 供应商设备封装： | SOT-143 |
| 包装： | 标准包装 |
| 产品目录页面： | 1110 (CN2011-ZH PDF) |
| 其它名称： | 576-1238-6 |
Micrel, Inc.
Functional Diagram
+2.7V to +9V
MIC5018
VS
D2
35V
Q1
I1
20 μ A
MIC5018
On
Off
CTL
R1 2k
D1
16V
Q2
R2
15k
EN CHARGE
PUMP
D3 16V
Q3
G
GND
Functional Diagram with External Components
(High-Side Driver Configuration)
Functional Description
Refer to the functional diagram.
The MIC5018 is a noninverting device. Applying a logic
high signal to CTL (control input) produces gate drive
output. The G (gate) output is used to turn on an
external N-channel MOSFET.
Supply
VS (supply) is rated for +2.7V to +9V. An external
capacitor is recommended to decouple noise.
Control
CTL (control) is a TTL compatible input. CTL must be
forced high or low by an external signal. A floating input
may cause unpredictable operation.
A high input turns on Q2, which sinks the output of
current source I1, making the input of the first inverter
low. The inverter output becomes high enabling the
charge pump.
Charge Pump
The charge pump is enabled when CTL is logic high.
The charge pump consists of an oscillator and voltage
quadrupler (4×). Output voltage is limited to 16V by a
zener diode. The charge pump output voltage will be
approximately:
V G = 4 × V SUPPLY – 2.8V, but not exceeding 16V
The oscillator operates from approximately 70kHz to
approximately 100kHz depending upon the supply
voltage and temperature.
Gate Output
The charge pump output is connected directly to the G
(gate) output. The charge pump is active only when CTL
is high. When CTL is low, Q3 is turned on by the second
inverter and discharges the gate of the external
MOSFET to force it off.
If CTL is high, and the voltage applied to VS drops to
zero, the gate output will be floating (unpredictable).
ESD Protection
D1 and D2 clamp positive and negative ESD voltages.
R1 isolates the gate of Q2 from sudden changes on the
CTL input. Q1 turns on if the emitter (CTL input) is
forced below ground to provide additional input
protection. Zener D3 also clamps ESD voltages for the
gate (G) output.
April 2006
5
M9999-042406
(408) 955-1690
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