参数资料
型号: MIC9130YQS
厂商: Micrel Inc
文件页数: 12/19页
文件大小: 0K
描述: IC CTRLR DC-DC PWM HV HS 16-QSOP
标准包装: 98
应用: 控制器,电信
输入电压: 9 V ~ 18 V
输出数: 1
输出电压: 4.7 V ~ 5 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
供应商设备封装: 16-QSOP
包装: 管件
产品目录页面: 1086 (CN2011-ZH PDF)
其它名称: 576-2418
MIC9130YQS-ND
MIC9130
Micrel, Inc.
T P_OSCILLATOR = t CHARGE + t DISCHARGE + t DELAY
VCC
2
Where t DELAY = 75ns
1 μ F
SYNC
5
f S _ OSCILLATOR =
f S OUTPU =
× f S OSCILLATOR
4
1
T P _ OSCILLATOR
1
_ _
The timing capacitor, C OSC , should be an NPO ceramic or a
temperature stable ? lm capacitor. Care must be taken when
2N3904
4.7 μ F
R OSC
1.6k
C OSC
33pF
VBIAS
4.7 μ F
OSC
AGND
9
4
11
3V
75ns
1-shot
using capacitor values less than 47pF. The high impedance of
a small value capacitor makes the OSC pin more susceptible
to switching noise. Also, the input capacitance of the OSC pin
and the stray capacitance of the board will have a noticeable
effect on the oscillator frequency.
Figure 5b
Oscillator Synchronization
The switching frequency of the MIC9130 can be synchronized
SYNC
5
to an external oscillator or frequency source. Figure 6 shows
VBIAS
9
3V
the relationship between the sync input, oscillator waveform
and gate drive output. The external frequency should be set
R OSC
OSC
4
at least 15% greater than the free running oscillator frequency
to account for tolerances in the oscillator circuit and external
C OSC
11
AGND
75ns
1-shot
components. The positive edge of the sync signal resets the
oscillator. The sync pulse frequency, like the oscillator, is twice
the gate drive frequency. When an external sync signal is
applied, the peak amplitude of the oscillator signal (pin 4) is
less than when it is free running because the oscillator signal
is terminated before it reaches its 3V (typical) amplitude.
When not used, the sync pin should be connected to ground
to prevent noise from erroneously resetting the oscillator.
V OSC
Gate Drive
(pin 16)
t ON
t PERIOD
Figure 5a
Higher Switching Frequencies
The MIC9130 is capable of very high switching frequencies.
One of the limitations on the maximum frequency is the cur-
rent capability of the 5V regulator supplying the oscillator
and V BIAS . By powering V BIAS with an external source, e.g.
linear regulator much higher switching frequencies can be
achieved. A simple way of using an external current source
is to set an NPN as an emitter follower. Figure 5b shows the
MIC9130 oscillator frequency set to 4MHz using an external
NPN. The emitter followerj circuit allows the current to be
supplied by V CC while the voltage is regulated to a diode
drop below V BIAS . This con ? guration is quite stable over
temperature and voltage variations.
TIME (500ns/div)
Figure 6. Sync Waveform
Soft Start Circuit
The soft start is programmed by a capacitor on the soft start
pin. A 4 μ A current source charges up the capacitor. At power
up, the SS pin is discharged. Once the UVLO and enable
functions release the soft start circuit, the voltage of the ca-
pacitor increases. The active voltage range of the soft start
pin is from typically from 0.9V to 1.7V. The internal current
source increases the voltage on the soft start capacitor to
approximately 4V. The soft start pin and the current sense
voltage are connected to a comparator in t?
PMIC9130. The voltage from the soft start pin effectively
limits the peak current through the current sense resistor by
prematurely terminating the on-time of the gate drive output.
Referring to Figure 1, with the soft start voltage low, the duty
cycle of the output is at a minimum. As the soft start voltage
increases, the duty cycle of the gate drive output increases
M9999-111108
12
November 2008
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