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参数资料
| 型号： | MK2049-34SITR |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 77.76 MHz, OTHER CLOCK GENERATOR, PDSO20 |
| 封装： | 0.300 INCH, SOIC-20 |
| 文件页数： | 2/9页 |
| 文件大小： | 96K |
| 代理商： | MK2049-34SITR |
MK2049-34
3.3 VOLT COMMUNICATIONS CLOCK VCXO PLL
VCXO AND SYNTHESIZER
IDT 3.3 VOLT COMMUNICATIONS CLOCK VCXO PLL
2
MK2049-34
REV F 102203
Pin Assignment
20-pin (300) mil SOIC
Pin Descriptions
16
1
15
2
14
FS1
FS0
3
13
X2
4
12
X1
RES
5
11
VDD
6
CAP2
7
FCAP
8
VDD
GND
CAP1
VDD
GND
CLK
ICLK
9
10
CLK/2
FS3
8k
FS2
20
19
18
17
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
FS1
Input
Frequency select 1. Determines CLK input/outputs per table on page 3.
2
X2
XO
Crystal connection. Connect to a MHz crystal as shown in table on page 3.
3
X1
XI
Crystal connection. Connect to a MHz crystal as shown in table on page 3.
4
VDD
Power
Power supply. Connect to +3.3 V.
5
FCAP
-
Filter capacitor. Connect a 1000 pF ceramic capacitor to ground.
6
VDD
Power
Power supply. Connect to +3.3 V.
7
GND
Power
Connect to ground
8
CLK
Output
Clock output determined by status of FS3:0 per tables on page 3.
9
CLK/2
Output
Clock output determined by status of FS3:0 per tables page 3. Always 1/2 of
CLK.
10
8k
Output
Recovered 8 kHz clock output.
11
FS2
Input
Frequency select 2. Determines CLK input/outputs per tables on page 3.
12
FS3
Input
Frequency select 3. Determines CLK input/outputs per tables on page 3.
13
ICLK
Input
Input clock connection. Connect to 8 kHz backplane or MHz clock.
14
GND
Power
Connect to ground.
15
VDD
Power
Power Supply. Connect to +3.3 V.
16
CAP1
Loop
Filter
Connect the loop filter ceramic capacitors and resistor between this pin and
CAP2.
17
GND
Power
Connect to ground.
18
CAP2
Loop
Connect the loop filter ceramic capacitors and resistor between this pin and
19
RES
-
Connect a 10-200k
Ω resistor to ground. Contact ICS at telecom@icst.com for
recommended value for your application.
20
FS0
Input
Frequency select 0. Determines CLK input/outputs per table on page 3.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MK2049-35 | 制造商:ICS 制造商全称:ICS 功能描述:3.3 V Communications Clock PLL |
| MK2049-35SI | 制造商:Integrated Device Technology Inc 功能描述:49.152 MHz, OTHER CLOCK GENERATOR, PDSO20 |
| MK2049-35SITR | 制造商:ICS 制造商全称:ICS 功能描述:3.3 V Communications Clock PLL |
| MK2049-36 | 制造商:ICS 制造商全称:ICS 功能描述:3.3 V Communications Clock PLL |
| MK2049-36SI | 功能描述:IC VCXO PLL CLK SYNTH 20-SOIC RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:39 系列:- 类型:* PLL:带旁路 输入:时钟 输出:时钟 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 频率 - 最大:170MHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:* 封装/外壳:* 供应商设备封装:* 包装:* |
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