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参数资料
| 型号： | MK2069-03GITR |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 160 MHz, OTHER CLOCK GENERATOR, PDSO56 |
| 封装： | 6.10 MM, 0.50 MM PITCH, TSSOP-56 |
| 文件页数： | 13/19页 |
| 文件大小： | 339K |
| 代理商： | MK2069-03GITR |
VCXO-Based Clock Translator with High Multiplication
MDS 2069-03
J
3
Revision 030906
Integrated Circuit Systems, Inc. l 525 Race Street, San Jose, CA 95126 l tel (408) 295-9800 l
MK2069-03
Pin Descriptions
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
ST0
Input
Scaling Divider bit 0 input, Translator PLL (internal pull-up).
2
ST1
Input
Scaling Divider bit 1 input, Translator PLL (internal pull-up).
3
RT0
Input
Reference Divider bit 0 input, Translator PLL (internal pull-up).
4
RT1
Input
Reference Divider bit 1 input, Translator PLL (internal pull-up).
5
FT0
Input
Feedback Divider bit 0 input, Translator PLL (internal pull-up).
6
FT1
Input
Feedback Divider bit 1 input, Translator PLL (internal pull-up).
7
FT2
Input
Feedback Divider bit 2 input, Translator PLL (internal pull-up).
8
FT3
Input
Feedback Divider bit 3 input, Translator PLL (internal pull-up).
9
FT4
Input
Feedback Divider bit 4 input, Translator PLL (internal pull-up).
10
FT5
Input
Feedback Divider bit 5 input, Translator PLL (internal pull-up).
11
FPV0
Input
Feedback Pre-Divider bit 0 input, VCXO PLL (internal pull-up).
12
VDDT
Power
Power Supply connection for Translator PLL.
13
GNDT
Ground
Ground connection for Translator PLL.
14
X1
-
Crystal oscillator input. Connect this pin to the external quartz crystal.
15
VDDV
Power
Power Supply connection for VCXO PLL.
16
X2
-
Crystal oscillator output. Connect this pin to the external quartz crystal.
17
GNDV
Ground
Ground connection for VCXO PLL.
18
LFR
-
Loop filter connection, reference node. Refer to loop filter circuit on page 6.
19
LF
-
Loop filter connection, active node. Refer to loop filter circuit on page 6.
20
ISET
-
Charge pump current setting pin. Refer to loop filter circuit on page 6.
21
FV0
Input
Feedback Divider bit 0 input, VCXO PLL (internal pull-up).
22
FV1
Input
Feedback Divider bit 1input, VCXO PLL (internal pull-up).
23
FV2
Input
Feedback Divider bit 2 input, VCXO PLL (internal pull-up).
24
FV3
Input
Feedback Divider bit 3 input, VCXO PLL (internal pull-up).
25
FV4
Input
Feedback Divider bit 4 input, VCXO PLL (internal pull-up).
26
FV5
Input
Feedback Divider bit 5 input, VCXO PLL (internal pull-up).
27
FV6
Input
Feedback Divider bit 6 input, VCXO PLL (internal pull-up).
28
FV7
Input
Feedback Divider bit 7 input, VCXO PLL (internal pull-up).
29
FV8
Input
Feedback Divider bit 8 input, VCXO PLL (internal pull-up).
30
FV9
Input
Feedback Divider bit 9 input, VCXO PLL (internal pull-up).
31
FV10
Input
Feedback Divider bit 10 input, VCXO PLL (internal pull-up).
32
FV11
Input
Feedback Divider bit 11 input, VCXO PLL (internal pull-up).
33
FPV1
Input
Feedback Pre-Divider bit 1 input, VCXO PLL (internal pull-up).
34
FPV2
Input
Feedback Pre-Divider bit 2 input, VCXO PLL (internal pull-up).
35
ICLK
Input
Reference clock input, 5V tolerant input
36
CLR
Input
Clear input, allows VCXO to free-run when low (internal pull-up).
37
LDC
-
Lock detector threshold setting circuit connection. Refer to circuit on page 10.
38
GND
Ground
Ground connection for internal digital circuitry.
39
LDR
Power
Lock detector threshold setting circuit connection. Refer to circuit on page 10.
40
RCLK
Output
VCXO PLL Reference Clock output.
41
GNDP
Ground
Ground connection for output drivers (VCLK, TCLK, RCLK, LD, LDR).
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MK2069-04 | 制造商:ICS 制造商全称:ICS 功能描述:VCXO-Based Universal Clock Translator |
| MK2069-04GI | 功能描述:IC VCXO CLK TRANSLATOR 56-TSSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:39 系列:- 类型:* PLL:带旁路 输入:时钟 输出:时钟 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 频率 - 最大:170MHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:* 封装/外壳:* 供应商设备封装:* 包装:* |
| MK2069-04GILF | 功能描述:时钟发生器及支持产品 VCXO-BASED UNIVERSAL CLOCK TRANSLATOR RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| MK2069-04GILFTR | 功能描述:时钟发生器及支持产品 VCXO-BASED UNIVERSAL CLOCK TRANSLATOR RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| MK2069-04GITR | 功能描述:IC VCXO CLK TRANSLATOR 56-TSSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:39 系列:- 类型:* PLL:带旁路 输入:时钟 输出:时钟 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 频率 - 最大:170MHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:* 封装/外壳:* 供应商设备封装:* 包装:* |
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