参数资料
型号: MMA6556KW
厂商: Freescale Semiconductor
文件页数: 13/53页
文件大小: 0K
描述: IC ACCELEROMETER X AXIS 16QFN
标准包装: 75
轴: X
加速范围: ±120g
灵敏度: 16 LSB/g
电源电压: 3.13 V ~ 5.25 V
输出类型: SPI
接口: SPI
安装类型: 表面贴装
封装/外壳: 16-QFN 裸露焊盘
供应商设备封装: 16-QFN-EP(6x6)
3.1.4
Part Number Register (PN)
The part number register is a one time programmable, read only register which contains two digits of the device part number
to identify the axis and range information. The contents of this register have no impact on device operation or performance.
Table 6. Part Number Register
Location
Bit
Address
$08
Register
PN
7
PN[7]
6
PN[6]
5
PN[5]
4
PN[4]
3
PN[3]
2
PN[2]
1
PN[1]
0
PN[0]
PN Register Value
Range Section 2.4
Decimal
HEX
255
00
$FF
$00
105
120
3.1.5
Device Control Register (DEVCTL)
The device control register is a read-write register which contains device control operations. The upper 2 bits of this register
can be written during both initialization and normal operation. Bits 5 through 0 can be programmed during initialization and then
are ignored once the ENDINIT bit is set.
Table 7. Device Control Register
Location
Bit
Address
Register
7
6
5
4
3
2
1
0
$0A
DEVCTL
RES_1
RES_0
OCPHASE[1] OCPHASE[0] OFFCFG_EN
Reserved
Reserved
Reserved
Reset Value
0
0
0
0
0
0
0
0
3.1.5.1 Reset Control (RES_1, RES_0)
A series of three consecutive register write operations to the reset control bits in the DEVCTL register will cause a device reset.
To reset the internal digital circuitry, the following register write operations must be performed in the order shown below. The reg-
ister write operations must be consecutive SPI commands in the order shown or the device will not be reset.
Register Write to DEVCTL
SPI Register Write 1
SPI Register Write 2
SPI Register Write 3
RES_1
0
1
0
RES_0
0
1
1
Effect
No Effect
No Effect
Device RESET
The response to the Register Write returns ‘0’ for RES_1 and RES_0, and the existing register value bits 5 through 0. A Reg-
ister Read of RES_1 and RES_0 returns ‘0’ and terminates the reset sequence. If ENDINIT is cleared, the bits 2 through 0 in the
DEVCTL register are modified as described in Section 4.4 . If ENDINIT is set, a Register Write will not modify bits 2 through 0 and
the response to a Register Read or Write will include the last successful written values for these bits.
MMA655x
Sensor
Freescale Semiconductor, Inc.
13
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