- 您现在的位置：买卖IC网 > PDF目录98027 > MPC5123VY300BR (FREESCALE SEMICONDUCTOR INC) RISC PROCESSOR, PBGA516 PDF资料下载
参数资料
| 型号： | MPC5123VY300BR |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | RISC PROCESSOR, PBGA516 |
| 封装： | 27 X 27 MM, 2.25 MM HEIGHT, 1 MM PITCH, ROHS COMPLIANT, PLASTIC, TFBGA-516 |
| 文件页数： | 21/86页 |
| 文件大小： | 719K |
| 代理商： | MPC5123VY300BR |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页当前第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页
MPC5121E/MPC5123 Data Sheet, Rev. 3
Electrical and Thermal Characteristics
Freescale Semiconductor
28
NOTES:
1. The SYS_XTALI frequency, Sys PLL, and CORE PLL settings must be chosen so that the resulting e300 clk, csb_clk, MCK,
frequencies do not exceed their respective maximum or minimum operating frequencies.
2. The values are valid for the user-operation mode. There can be deviations for test modes.
3. The selection of the peripheral clock frequencies needs to take care about requirements for baud rates and minimum frequency
limitation.
4.The DDR data rate is 2x the DDR memory bus frequency.
See the MPC5121e Reference Manual for more information on the clock subsystem.
3.3.3
Resets
The MPC5121e/MPC5123 has three reset pins:
PORESET - Power on Reset
HRESET - Hard Reset
SRESET - Software Reset
These signals are asynchronous I/O signals and can be asserted at any time. The input side uses a Schmitt trigger and requires
the same input characteristics as other MPC5121e/MPC5123 inputs, as specified in the DC Electrical Specifications section.
As long as VDD is not stable the HRESET output is not stable.
The timing relationship can be seen below.
NFC Clock
2.08
83
MHz
A1.7
DIU Clock
0.78
100
MHz
A1.8
SDHC Clock
0.78
66.6
MHz
A1.9
MBX Clock
6.25
100
MHz
A1.10
Table 17. Reset Rise / Fall Timing
Description
Min
Max
Unit
SpecID
PORESET1 fall time
1 Make sure that the PORESET does not carry any glitches. The
MPC5121e/MPC5123 has no filter to prevent them from getting into the chip.
—1
ms
A3.4
PORESET rise time
—
1
ms
A3.5
HRESET2,3 fall time
2 HRESET and SRESET must have a monotonous rise time.
3 The assertion of HRESET becomes active at Power on Reset without any
SYS_XTALI clock.
—1
ms
A3.6
HRESET rise time
—
1
ms
A3.7
SRESET fall time
—
1
ms
A3.8
SRESET rise time
—
1
ms
A3.9
Table 16. Clock Frequencies (continued)
Min
Max
Units
SpecID
相关PDF资料 |
PDF描述 |
|---|---|
| SPC5121YVY400BR | RISC PROCESSOR, PBGA516 |
| MPC601CQ50A | RISC PROCESSOR |
| MPC601CQ66A | 32-BIT, 66 MHz, RISC PROCESSOR, CQFP304 |
| MPC604ERX300XX | RISC PROCESSOR, CBGA255 |
| MPC7410RX550PE | 32-BIT, 550 MHz, RISC PROCESSOR, CBGA360 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MPC5123VY400B | 功能描述:微处理器 - MPU TELEMATICS PROCESSOR RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| MPC5123VY400BR | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:e300 Power Architecture processor core |
| MPC5123YVY300B | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Advance Information |
| MPC5123YVY300BR | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Advance Information |
| MPC5123YVY400B | 功能描述:微处理器 - MPU TELEMATICS PROCESSOR RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
发布紧急采购，3分钟左右您将得到回复。