参数资料
型号: MPC5123VY400B
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: RISC PROCESSOR, PBGA516
封装: 27 X 27 MM, ROHS COMPLIANT, PLASTIC, TFBGA-516
文件页数: 13/86页
文件大小: 1266K
代理商: MPC5123VY400B
MPC5121E/MPC5123 Data Sheet, Rev. 1
Electrical and Thermal Characteristics
Freescale Semiconductor
20
1
Notes:
1. General IO – Rise and Fall Times at Drive load 50pF.
2. PCI – Rise and Fall Times at Drive load 10pF.
3. DDR – for LPDDR/Mobile-DDR, slew rate is measured between 20 % VDD_IO_MEM and 80 % VDD_IO_MEM
4. DDR – for DDR, DDR2, rising signals, slew rate is measured between VDD_IO_MEM * 0.5 and ViHAC. For falling signals, slew
rate is measured between VDD_IO_MEM * 0.5 and ViLAC.
5. DDR – Rise and Fall Times terminated at the destination with 50 ohm to MVTT (0.5*VDD_IO_MEM) with 4pF, representing the
DDR input capacitance.
3.1.4
Electrostatic Discharge
CAUTION
This device contains circuitry that protects against damage due to high-static voltage or
electrical fields. However, it is advised that normal precautions be taken to avoid
application of any voltages higher than maximum-rated voltages. Operational
reliability is enhanced if unused inputs are tied to an appropriate logic voltage level (GND
or VDD). Table 10 gives package thermal characteristics for this device.
4 This parameter is meant for those who do not use quartz crystals or resonators, but signal generator clock to drive, in bypass
mode. In that case, drive only the xtal_in pin not connecting anything to other pin for the oscillator’s comparator to produce
output clock.
5 Leakage current is measured with output drivers disabled and pull-up/pull-downs inactive.
6 Pullup current is measured at VIL and pulldown current is measured at VIH.
7 See Table 7 for the typical drive capability of a specific signal pin based on the type of output driver associated with that pin as
listed in Table 3.
8 All injection current is transferred to VDD_IO/VDD_MEM_IO. An external load is required to dissipate this current to maintain
the power supply within the specified voltage range.
Total injection current for all digital input-only and all digital input/output pins must not exceed 10 mA. Exceeding this limit can
cause disruption of normal operation.
Table 7. I/O Pads - Drive Current, Slew Rate
Pad Type
Supply Voltage
Drive Select/Slew
Rate Control
Rise time
max (ns)
Fall time
max (ns)
Current
Ioh (mA)
Current
Iol (mA)
SpecID
General IO
VDD_IO = 3.3V
configuration 3 (11)
1.4
1.6
35
D3.41
configuration 2 (10)
9.8
12
D3.42
configuration 1 (01)
19
24
D3.43
configuration 0 (00)
140
183
D3.44
DDR
VDD_MEM_IO = 2.5V (DDR) configuration 3 (011)
2
16.2
D3.45
VDD_MEM_IO = 1.8V
(LPDDR)
configuration 0 (000)
1
4.6
D3.46
configuration 1 (001)
8.1
D3.47
VDD_MEM_IO = 1.8V
(DDR2)
configuration 2 (010)
1
5.3
D3.48
configuration 6 (110)
13.4
D3.49
PCI
VDD_IO = 3.3V
configuration 1 (1)
1.4
11
17
D3.50
configuration 0 (0)
2
D3.51
Preliminary
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