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参数资料
| 型号： | MPC5567MZP112 |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | FLASH, 112 MHz, MICROCONTROLLER, PBGA416 |
| 封装： | 27 X 27 MM, 1 MM PITCH, PLASTIC, MS-034AAL-1, BGA-416 |
| 文件页数： | 54/66页 |
| 文件大小： | 1903K |
| 代理商： | MPC5567MZP112 |
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MPC5567 Microcontroller Data Sheet, Rev. 1.0
Revision History for the MPC5567 Data Sheet
Freescale Semiconductor
58
5
Revision History for the MPC5567 Data Sheet
The history of revisions made to this data sheet are described in this section. The changes are divided into
each revision of this document, and are listed in sequential page number order.
5.1
Information Changed Between Rev. 0.0 and 1.0
The following table lists the global changes incorporated throughout the document, and substantive text
changes made to paragraphs.
Table 32. Global and Text Changes Between Rev. 0.0 and 1.0
Location
Description of Change
Global Changes
Starting at the third paragraph and throughout the document, replaced:
kilobytes with KB
megabytes with MB
Put overbars on the following signals: BDIP, OE, TA, TEA, TS, RSTCFG
Changed WE[0:3]/BE[0:3] to WE/BE[0:3].
Added the Fast Ethernet Controller (FEC) information.
First paragraph, text changed from “. . . based on the PowerPC Book E architecture” to “. . . built on the Power
Architecture embedded technology.”
Second paragraph: Changed terminology from PowerPC Book E architecture to Power Architecture terminology.
Added new fourth paragraph about VLE feature.
Added the VLE paragraph.
Added paragraph about the Fast Ethernet Controller directly after the System Integration Unit paragraph.
Added paragraph about the FlexRay Controller directly after the Fast Ethernet Controller paragraph.
Added the sentence directly preceding Table 1: ‘Unless noted in this data sheet, all specifications apply
from TL to TH.’
Sections 3.7.1, 3.7.2 and 3.7.3: Reordered sections resulting in the following order and section renumbering:
From: ‘To avoid accidentally selecting the bypass clock because PLLCFG[0:1] and RSTCFG are not treated as ones
(1s) when POR negates, VDD33 must not lag VDDSYN and the RESET pin power (VDDEH6) when powering the device
by more than the VDD33 lag specification in Table 6. VDD33 individually can lag either VDDSYN or the RESET power
pin (VDDEH6) by more than the VDD33 lag specification. VDD33 can lag one of the VDDSYN or VDDEH6 supplies, but
cannot lag both by more than the VDD33 lag specification. This VDD33 lag specification only applies during power up.
VDD33 has no lead or lag requirements when powering down.’
To:
‘When powering the device, VDD33 must not lag VDDSYN and the RESET power pin (VDDEH6) by more than the
VDD33 lag specification listed in Table 6. This avoids accidentally selecting the bypass clock mode because the
internal versions of PLLCFG[0:1] and RSTCFG are not powered and therefore cannot read the default state when
POR negates. VDD33 can lag VDDSYN or the RESET power pin (VDDEH6), but cannot lag both by more than the
VDD33 lag specification. This VDD33 lag specification only applies during power up. VDD33 has no lead or lag
requirements when powering down.’
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
MPC551x
and
MPC5533
products
in
208
MAPBGA
packages;
MPC5534
and
MPC5553
products
in
208
and
496
MAPBGA
packages;
MPC5554,
MPC5565,
MPC5566
and
MPC5567
products
in
496
MAPBGA
packages
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MPC5567MZP112R2 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Microcontroller |
| MPC5567MZP132 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Microcontroller |
| MPC5567MZP132R2 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Microcontroller |
| MPC5567MZP80 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Microcontroller |
| MPC5567MZP80R2 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:Microcontroller |
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