参数资料
型号: MPC5646CCF0CLU8R
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 32-BIT, FLASH, 80 MHz, MICROCONTROLLER, PQFP176
封装: 24 X 24 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, LQFP-176
文件页数: 103/115页
文件大小: 783K
代理商: MPC5646CCF0CLU8R
MPC5646C Microcontroller Datasheet, Rev. 4
Preliminary—Subject to Change Without Notice
Electrical Characteristics
Freescale Semiconductor
88
9
Data Setup Time for Inputs
Master (MTFE = 0)
Slave
Master (MTFE = 1, CPHA = 0)5
Master (MTFE = 1, CPHA = 1)
tSUI
36
5
36
ns
10
Data Hold Time for Inputs
Master (MTFE = 0)
Slave
Master (MTFE = 1, CPHA = 0)5
Master (MTFE = 1, CPHA = 1)
tHI
0
4
0
ns
11
Data Valid (after SCK edge)
Master (MTFE = 0)
Slave
Master (MTFE = 1, CPHA = 0)
Master (MTFE = 1, CPHA = 1)
tSUO
12
37
12
ns
12
Data Hold Time for Outputs
Master (MTFE = 0)
Slave
Master (MTFE = 1, CPHA = 0)
Master (MTFE = 1, CPHA = 1)
tHO
06
9.5
07
08
ns
1 This value of this parameter is dependent upon the external device delays and the other parameters mentioned in
this table.
2 The maximum value is programmable in DSPI_CTARn [PSSCK] and DSPI_CTARn [CSSCK]. For MPC5646C, the
spec value of tCSC will be attained only if TDSPI x PSSCK x CSSCK > tCSC .
3 The maximum value is programmable in DSPI_CTARn [PASC] and DSPI_CTARn [ASC]. For MPC5646C, the spec
value of tASC will be attained only if TDSPI x PASC x ASC > tASC.
4 The parameter value is obtained from t
SUSS and tSUO for slave.
5 This number is calculated assuming the SMPL_PT bitfield in DSPI_MCR is set to 0b00.
6
For DSPI1, the Data Hold Time for Outputs in Master (MTFE = 0) is
2 ns.
7
For DSPI1, the Data Hold Time for Outputs in Master (MTFE = 1, CPHA = 0) is
2 n.
8
For DSPI1, the Data Hold Time for Outputs in Master (MTFE = 1, CPHA = 1) is
2 ns.
Table 49. DSPI timing (continued)
Spec
Characteristic
Symbol
Unit
Min
Max
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