
PRELIMINAR
Y
PID9q-604e Hardware Specifications
7
PRELIMINARYSUBJECT TO CHANGE WITHOUT NOTICE
Table 3 provides the thermal characteristics for the 604e.
Table 4 provides the DC electrical characteristics for the 604e.
Table 3. Thermal Characteristics
Characteristic
Symbol
Value
Rating
CBGA package thermal resistance, junction-to-top of die
qJC
0.03
C/W
Note: Refer to Section 1.8, System Design Information, for more details about thermal management.
Table 4. DC Electrical Specifications
Vdd = AVdd = 1.9 ±100 mV dc, OVdd = 3.3 ± 5% V dc, GND = 0 V dc, 0
Tj 105 C
Characteristic
Symbol
Min
Max
Unit
Input high voltage (all inputs except SYSCLK)
VIH
2.0
3.465
V
Input low voltage (all inputs except SYSCLK)
VIL
0.0
0.8
V
SYSCLK input high voltage
CVIH
2.4
3.465
V
SYSCLK input low voltage
CVIL
0.0
0.4
V
Input leakage current, Vin = 3.3 V
1
Iin
10
A
Hi-Z (off-state) leakage current, Vin = 3.3 V
1
ITSI
10
A
Output high voltage, IOH = 2 mA
VOH
2.4
V
Output low voltage, IOL = 2 mA
VOL
0.4
V
Capacitance, Vin = 0 V, f = 1 MHz
2 (excludes TS, ABB, DBB,
and ARTRY)
Cin
10.0
pF
Capacitance, Vin = 0 V, f = 1 MHz
2 (for TS, ABB, DBB, and
ARTRY)
Cin
15.0
pF
Output impedance
Normal mode (DRV_MOD[01] = 01)
Strong mode (DRV_MOD[01] = 10)
Herculean mode (DRV_MOD[01] = 11)
Zo
56
42
30
84
57
30
W
Notes:
1. Excludes test signals (LSSD_MODE, L1_TSTCLK, L2_TSTCLK, and JTAG signals).
2. Capacitance values are guaranteed by design and characterization, and are not tested.
3. Output impedance is guaranteed by design and is not tested. Refer to IBIS simulation models for output
impedance values based on Vdd and OVdd tolerances used in system.