参数资料
型号: MPC8306SVMADDCA
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 266 MHz, RISC PROCESSOR, PBGA369
封装: 19 X 19 MM, 1.61 MM HEIGHT, 0.80 MM PITCH, LEAD FREE, MAPBGA-369
文件页数: 22/71页
文件大小: 452K
代理商: MPC8306SVMADDCA
MPC8306S PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 0
Freescale Semiconductor
29
TDM/SI
9.2
TDM/SI AC Timing Specifications
Table 27 provides the TDM/SI input and output AC timing specifications.
Figure 18 provides the AC test load for the TDM/SI.
Figure 18. TDM/SI AC Test Load
Table 26. TDM/SI DC Electrical Characteristics
Characteristic
Symbol
Condition
Min
Max
Unit
Output high voltage
VOH
IOH = –2.0 mA
2.4
V
Output low voltage
VOL
IOL = 3.2 mA
0.5
V
Input high voltage
VIH
—2.0
OVDD +0.3
V
Input low voltage
VIL
—–0.3
0.8
V
Input current
IIN
0 V
VIN OVDD
—±5
A
Table 27. TDM/SI AC Timing Specifications1
Characteristic
Symbol2
Min
Max
Unit
TDM/SI outputs—External clock delay
tSEKHOV
214
ns
TDM/SI outputs—External clock High Impedance
tSEKHOX
210
ns
TDM/SI inputs—External clock input setup time
tSEIVKH
5—
ns
TDM/SI inputs—External clock input hold time
tSEIXKH
2—
ns
Notes:
1. Output specifications are measured from the 50% level of the rising edge of QE_CLK_IN to the 50% level of the signal.
Timings are measured at the pin.
2. The symbols used for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state)(reference)(state) for
inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tSEKHOX symbolizes the TDM/SI
outputs external timing (SE) for the time tTDM/SI memory clock reference (K) goes from the high state (H) until outputs (O)
are invalid (X).
Output
Z0 = 50
OVDD/2
RL = 50
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