参数资料
型号: MPC8306SVMADDCA
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 266 MHz, RISC PROCESSOR, PBGA369
封装: 19 X 19 MM, 1.61 MM HEIGHT, 0.80 MM PITCH, LEAD FREE, MAPBGA-369
文件页数: 53/71页
文件大小: 452K
代理商: MPC8306SVMADDCA
MPC8306S PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 0
Freescale Semiconductor
57
Clocking
NOTE
Setting the clock ratio of these units must be performed prior to any access
to them.
Table 48 provides the maximum operating frequencies for the MPC8306S MAPBGA under recommended
operating conditions (see Table 2).
Table 47. Configurable Clock Units
Unit
Default Frequency
Options
I2C,SDHC, USB, DMA Complex
csb_clk
Off, csb_clk, csb_clk/2, csb_clk/3
Table 48. Operating Frequencies for MAPBGA
Characteristic1
1 The SYS_CLK_IN frequency, RCWL[SPMF], and RCWL[COREPLL] settings must be chosen such that the resulting csb_clk,
MCLK, LCLK, and core_clk frequencies do not exceed their respective maximum or minimum operating frequencies.
Max Operating Frequency
Unit
e300 core frequency (core_clk)266
MHz
Coherent system bus frequency (csb_clk)133
MHz
QUICC Engine frequency (qe_clk)200
MHz
DDR2 memory bus frequency (MCLK)2
2 The DDR2 data rate is 2× the DDR2 memory bus frequency.
133
MHz
Local bus frequency (LCLKn)3
3 The local bus frequency is 1/2, 1/4, or 1/8 of the lb_clk frequency (depending on LCCR[CLKDIV]) which is in turn 1× or 2× the
csb_clk
frequency (depending on RCWL[LBCM]).
66
MHz
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