- 您现在的位置：买卖IC网 > PDF目录45360 > MPC8313VRAGDA (FREESCALE SEMICONDUCTOR INC) 32-BIT, 400 MHz, MICROPROCESSOR, PBGA516 PDF资料下载
参数资料
| 型号： | MPC8313VRAGDA |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 400 MHz, MICROPROCESSOR, PBGA516 |
| 封装： | 27 X 27 MM, 2.25 MM HEIGHT, 1 MM PITCH, LEAD FREE, TEPBGAII-516 |
| 文件页数： | 11/100页 |
| 文件大小： | 1247K |
| 代理商： | MPC8313VRAGDA |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页当前第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页
MPC8313E PowerQUICC II Pro Processor Hardware Specifications, Rev. 3
18
Freescale Semiconductor
DDR and DDR2 SDRAM
MDQS epilogue end
tDDKHME
–0.6
0.6
ns
6
Notes:
1. The symbols used for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state)(reference)(state) for
inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. Output hold time can be read as DDR timing
(DD) from the rising or falling edge of the reference clock (KH or KL) until the output went invalid (AX or DX). For example,
tDDKHAS symbolizes DDR timing (DD) for the time tMCK memory clock reference (K) goes from the high (H) state until
outputs (A) are setup (S) or output valid time. Also, tDDKLDX symbolizes DDR timing (DD) for the time tMCK memory clock
reference (K) goes low (L) until data outputs (D) are invalid (X) or data output hold time.
2. All MCK/MCK referenced measurements are made from the crossing of the two signals ±0.1 V.
3. ADDR/CMD includes all DDR SDRAM output signals except MCK/MCK, MCS, and MDQ//MDM/MDQS.
4. Note that tDDKHMH follows the symbol conventions described in note 1. For example, tDDKHMH describes the DDR timing (DD)
from the rising edge of the MCK[n] clock (KH) until the MDQS signal is valid (MH). tDDKHMH can be modified through control
of the DQSS override bits in the TIMING_CFG_2 register. This is typically set to the same delay as the clock adjust in the
CLK_CNTL register. The timing parameters listed in the table assume that these 2 parameters have been set to the same
adjustment value. See the
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, for a
description and understanding of the timing modifications enabled by use of these bits.
5. Determined by maximum possible skew between a data strobe (MDQS) and any corresponding bit of data (MDQ), ECC
(MECC), or data mask (MDM). The data strobe should be centered inside of the data eye at the pins of the microprocessor.
6. All outputs are referenced to the rising edge of MCK[n] at the pins of the microprocessor. Note that tDDKHMP follows the
symbol conventions described in note 1.
Table 21. DDR and DDR2 SDRAM Output AC Timing Specifications for Silicon Rev 2.x or Later
Parameter
Symbol1
Min
Max
Unit
Notes
MCK[
n] cycle time, MCK[n]/MCK[n] crossing
tMCK
610
ns
2
ADDR/CMD output setup with respect to MCK
tDDKHAS
ns
3
333 MHz
2.1
—
266 MHz
2.5
—
ADDR/CMD output hold with respect to MCK
tDDKHAX
ns
3
333 MHz
2.0
—
266 MHz
2.7
—
MCS[
n] output setup with respect to MCK
tDDKHCS
ns
3
333 MHz
2.1
—
266 MHz
3.15
—
MCS[
n] output hold with respect to MCK
tDDKHCX
ns
3
333 MHz
2.0
—
266 MHz
2.7
—
MCK to MDQS Skew
tDDKHMH
–0.6
0.6
ns
4
MDQ//MDM output setup with respect to
MDQS
tDDKHDS,
tDDKLDS
ps
5
333 MHz
800
—
266 MHz
900
—
MDQ//MDM output hold with respect to MDQS
tDDKHDX,
tDDKLDX
ps
5
333 MHz
750
—
266 MHz
1000
—
Table 20. DDR and DDR2 SDRAM Output AC Timing Specifications for Rev. 1.0 Silicon (continued)
Parameter
Symbol 1
Min
Max
Unit
Notes
相关PDF资料 |
PDF描述 |
|---|---|
| MPC8313VRAFFB | 32-BIT, 333 MHz, MICROPROCESSOR, PBGA516 |
| MPC8313CVRAFF | 32-BIT, 333 MHz, MICROPROCESSOR, PBGA516 |
| MPC8313ECVRAFF | 32-BIT, 333 MHz, MICROPROCESSOR, PBGA516 |
| MPC8313CZQAGDA | 32-BIT, 400 MHz, MICROPROCESSOR, PBGA516 |
| MPC8314ECVRADDA | MICROPROCESSOR, PBGA620 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MPC8313VRAGDB | 功能描述:微处理器 - MPU PBGA W/O ENCR RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| MPC8313VRAGDC | 功能描述:微处理器 - MPU 8313 REV2.2 NO ENC RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| MPC8313VRGDD | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
| MPC8313VRGDDA | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
| MPC8313VRGDDB | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
发布紧急采购，3分钟左右您将得到回复。