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参数资料
| 型号： | MPC8313VRAGDB |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 400 MHz, MICROPROCESSOR, PBGA516 |
| 封装： | 27 X 27 MM, 2.25 MM HEIGHT, 1 MM PITCH, LEAD FREE, TEPBGAII-516 |
| 文件页数： | 40/100页 |
| 文件大小： | 1247K |
| 代理商： | MPC8313VRAGDB |
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MPC8313E PowerQUICC II Pro Processor Hardware Specifications, Rev. 3
44
Freescale Semiconductor
High-Speed Serial Interfaces (HSSI)
Figure 31. Differential Measurement Points for Rise and Fall Time
Figure 32. Single-Ended Measurement Points for Rise and Fall Time Matching
The other detailed AC requirements of the SerDes reference clocks is defined by each interface protocol
based on application usage. Refer to the following section for detailed information:
9.2.4.1
Spread Spectrum Clock
SD_REF_CLK/SD_REF_CLK are not intended to be used with, and should not be clocked by, a spread
spectrum clock source.
Rising edge rate (SDn_REF_CLK) to falling edge rate
(SDn_REF_CLK) matching
Rise-fall
matching
—20
%
1, 4
Notes:
1. Measurement taken from single-ended waveform.
2. Measurement taken from differential waveform.
3. Measured from –200 to +200 mV on the differential waveform (derived from SD
n_REF_CLK minus SDn_REF_CLK). The
signal must be monotonic through the measurement region for rise and fall time. The 400 mV measurement window is
centered on the differential zero crossing. See Figure 31.
4. Matching applies to rising edge rate for SD
n_REF_CLK and falling edge rate for SDn_REF_CLK. It is measured using a
200 mV window centered on the median cross point, where SD
n_REF_CLK rising meets SDn_REF_CLK falling. The median
cross point is used to calculate the voltage thresholds the oscilloscope is to use for the edge rate calculations. The rise edge
rate of SD
n_REF_CLK should be compared to the fall edge rate of SDn_REF_CLK, the maximum allowed difference should
not exceed 20% of the slowest edge rate. See Figure 32.
Table 40. SerDes Reference Clock Common AC Parameters (continued)
At recommended operating conditions with XVDD_SRDS1 or XVDD_SRDS2 = 1.0 V ± 5%.
Parameter
Symbol
Min
Max
Unit
Notes
VIH = +200 mV
VIL = –200 mV
0.0 V
SD
n_REF_CLK
Minus
SD
n_REF_CLK
Fall Edge Rate
Rise Edge Rage
SD
n_REF_CLK
SD
n_REF_CLK
SD
n_REF_CLK
SD
n_REF_CLK
SD
n_REF_CLK
VCROSS MEDIAN
VCROSS MEDIAN + 100 mV
VCROSS MEDIAN – 100 mV
TFALL
TRISE
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相关代理商/技术参数 |
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|---|---|
| MPC8313VRAGDC | 功能描述:微处理器 - MPU 8313 REV2.2 NO ENC RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| MPC8313VRGDD | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
| MPC8313VRGDDA | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
| MPC8313VRGDDB | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
| MPC8313VRGDF | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
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