参数资料
型号: MPC8313VRAGDB
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 400 MHz, MICROPROCESSOR, PBGA516
封装: 27 X 27 MM, 2.25 MM HEIGHT, 1 MM PITCH, LEAD FREE, TEPBGAII-516
文件页数: 57/100页
文件大小: 1247K
代理商: MPC8313VRAGDB
MPC8313E PowerQUICC II Pro Processor Hardware Specifications, Rev. 3
6
Freescale Semiconductor
Electrical Characteristics
1.10
Serial Peripheral Interface (SPI)
The serial peripheral interface (SPI) allows the MPC8313E to exchange data between other PowerQUICC
family chips, Ethernet PHYs for configuration, and peripheral devices such as EEPROMs, real-time
clocks, A/D converters, and ISDN devices.
The SPI is a full-duplex, synchronous, character-oriented channel that supports a four-wire interface
(receive, transmit, clock, and slave select). The SPI block consists of transmitter and receiver sections, an
independent baud-rate generator, and a control unit.
1.11
DMA Controller, Dual I2C, DUART, Local Bus Controller, and
Timers
The MPC8313E provides an integrated four-channel DMA controller with the following features:
Allows chaining (both extended and direct) through local memory-mapped chain descriptors
(accessible by local masters)
Supports misaligned transfers
There are two I2C controllers. These synchronous, multi-master buses can be connected to additional
devices for expansion and system development.
The DUART supports full-duplex operation and is compatible with the PC16450 and PC16550
programming models. The 16-byte FIFOs are supported for both the transmitter and the receiver.
The MPC8313E local bus controller (LBC) port allows connections with a wide variety of external DSPs
and ASICs. Three separate state machines share the same external pins and can be programmed separately
to access different types of devices. The general-purpose chip select machine (GPCM) controls accesses
to asynchronous devices using a simple handshake protocol. The three user programmable machines
(UPMs) can be programmed to interface to synchronous devices or custom ASIC interfaces. Each chip
select can be configured so that the associated chip interface can be controlled by the GPCM or UPM
controller. The FCM provides a glueless interface to parallel-bus NAND Flash E2PROM devices. The
FCM contains three basic configuration register groups—BRn, ORn, and FMR. Both may exist in the
same system. The local bus can operate at up to 66 MHz.
The MPC8313E system timers include the following features: periodic interrupt timer, real time clock,
software watchdog timer, and two general-purpose timer blocks.
2
Electrical Characteristics
This section provides the AC and DC electrical specifications and thermal characteristics for the
MPC8313E. The MPC8313E is currently targeted to these specifications. Some of these specifications are
independent of the I/O cell, but are included for a more complete reference. These are not purely I/O buffer
design specifications.
相关PDF资料
PDF描述
MPC8313VRAGDA 32-BIT, 400 MHz, MICROPROCESSOR, PBGA516
MPC8313VRAFFB 32-BIT, 333 MHz, MICROPROCESSOR, PBGA516
MPC8313CVRAFF 32-BIT, 333 MHz, MICROPROCESSOR, PBGA516
MPC8313ECVRAFF 32-BIT, 333 MHz, MICROPROCESSOR, PBGA516
MPC8313CZQAGDA 32-BIT, 400 MHz, MICROPROCESSOR, PBGA516
相关代理商/技术参数
参数描述
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