参数资料
型号: MPC8323E-MDS-PB
厂商: Freescale Semiconductor
文件页数: 36/82页
文件大小: 0K
描述: BOARD MODULE DEV SYSTEM 8323
标准包装: 1
类型: MPU
适用于相关产品: MPC8323
所含物品:
MPC8323E PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 4
Freescale Semiconductor
41
TDM/SI
Figure 31 and Figure 32 represent the AC timing from Table 45. Note that although the specifications
generally reference the rising edge of the clock, these AC timing diagrams also apply when the falling edge
is the active edge.
Figure 31 shows the SPI timing in slave mode (external clock).
Figure 31. SPI AC Timing in Slave Mode (External Clock) Diagram
Figure 32 shows the SPI timing in master mode (internal clock).
Figure 32. SPI AC Timing in Master Mode (Internal Clock) Diagram
17 TDM/SI
This section describes the DC and AC electrical specifications for the time-division-multiplexed and serial
interface of the MPC8323E.
17.1
TDM/SI DC Electrical Characteristics
Table 46 provides the DC electrical characteristics for the MPC8323E TDM/SI.
Table 46. TDM/SI DC Electrical Characteristics
Characteristic
Symbol
Condition
Min
Max
Unit
Output high voltage
VOH
IOH = –2.0 mA
2.4
V
Output low voltage
VOL
IOL = 3.2 mA
0.5
V
Input high voltage
VIH
—2.0
OVDD +0.3
V
SPICLK (Input)
tNEIXKH
tNEIVKH
tNEKHOV
Input Signals:
SPIMOSI
(See Note)
Output Signals:
SPIMISO
(See Note)
Note: The clock edge is selectable on SPI.
SPICLK (Output)
tNIIXKH
tNIKHOV
Input Signals:
SPIMISO
(See Note)
Output Signals:
SPIMOSI
(See Note)
Note: The clock edge is selectable on SPI.
tNIIVKH
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