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| 型号： | MPC8323ZQAFDCA |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 333 MHz, RISC PROCESSOR, PBGA516 |
| 封装： | 27 X 27 MM, 2.25 MM HEIGHT, 1 MM PITCH, PLASTIC, PBGA-516 |
| 文件页数： | 23/82页 |
| 文件大小： | 1134K |
| 代理商： | MPC8323ZQAFDCA |
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MPC8323E PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 4
Freescale Semiconductor
3
Overview
NOTE
The QUICC Engine block can also support a UTOPIA level 2 capable of
supporting 31 multi-PHY (MPC8323E- and MPC8323-specific).
The MPC8323E security engine (SEC 2.2) allows CPU-intensive cryptographic operations to be offloaded
from the main CPU core. The security-processing accelerator provides hardware acceleration for the DES,
3DES, AES, SHA-1, and MD-5 algorithms.
In summary, the MPC8323E family provides users with a highly integrated, fully programmable
communications processor. This helps ensure that a low-cost system solution can be quickly developed
and offers flexibility to accommodate new standards and evolving system requirements.
1.1
MPC8323E Features
Major features of the MPC8323E are as follows:
High-performance, low-power, and cost-effective single-chip data-plane/control-plane solution for
ATM or IP/Ethernet packet processing (or both).
MPC8323E QUICC Engine block offers a future-proof solution for next generation designs by
supporting programmable protocol termination and network interface termination to meet evolving
protocol standards.
Single platform architecture supports the convergence of IP packet networks and ATM networks.
DDR1/DDR2 memory controller—one 32-bit interface at up to 266 MHz supporting both DDR1
and DDR2.
An e300c2 core built on Power Architecture technology with 16-Kbyte instruction and data caches,
and dual integer units.
Peripheral interfaces such as 32-bit PCI (2.2) interface up to 66-MHz operation, 16-bit local bus
interface up to 66-MHz operation, and USB 2.0 (full-/low-speed).
Security engine provides acceleration for control and data plane security protocols.
High degree of software compatibility with previous-generation PowerQUICC processor-based
designs for backward compatibility and easier software migration.
1.1.1
Protocols
The protocols are as follows:
ATM SAR up to 155 Mbps (OC-3) full duplex, with ATM traffic shaping (ATF TM4.1)
Support for ATM AAL1 structured and unstructured circuit emulation service (CES 2.0)
Support for IMA and ATM transmission convergence sub-layer
ATM OAM handling features compatible with ITU-T I.610
IP termination support for IPv4 and IPv6 packets including TOS, TTL, and header checksum
processing
Extensive support for ATM statistics and Ethernet RMON/MIB statistics
Support for 64 channels of HDLC/transparent
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| MPC832XE-MDS-PB | 功能描述:开发板和工具包 - 其他处理器 PROCESSOR BOARD (SOCKET) RoHS:否 制造商:Freescale Semiconductor 产品:Development Systems 工具用于评估:P3041 核心:e500mc 接口类型:I2C, SPI, USB 工作电源电压: |
| MPC8343CVRADD | 功能描述:IC MPU PWRQUICC II PRO 620-PBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - 微处理器 系列:MPC83xx 标准包装:1 系列:MPC85xx 处理器类型:32-位 MPC85xx PowerQUICC III 特点:- 速度:1.2GHz 电压:1.1V 安装类型:表面贴装 封装/外壳:783-BBGA，FCBGA 供应商设备封装:783-FCPBGA（29x29） 包装:托盘 |
| MPC8343CVRADDB | 功能描述:微处理器 - MPU 8347 PBGA NO-PB W/O ENCR RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| MPC8343CVRAGD | 功能描述:IC MPU PWRQUICC II PRO 620-PBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - 微处理器 系列:MPC83xx 标准包装:1 系列:MPC85xx 处理器类型:32-位 MPC85xx PowerQUICC III 特点:- 速度:1.2GHz 电压:1.1V 安装类型:表面贴装 封装/外壳:783-BBGA，FCBGA 供应商设备封装:783-FCPBGA（29x29） 包装:托盘 |
| MPC8343CVRAGDB | 功能描述:微处理器 - MPU 8347 PBGA NO-PB W/O ENCR RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
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