参数资料
型号: MPC8349E-MITXE
厂商: Freescale Semiconductor
文件页数: 32/48页
文件大小: 0K
描述: BOARD REFERENCE FOR MPC8349
产品培训模块: MPC834x PowerQUICC II Processors
标准包装: 1
系列: PowerQUICC II™ PRO
类型: MPU
适用于相关产品: MPC8349E
所含物品: 模块和其他硬件
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其它名称: MPC8349E-MITXE -ND
MPC8349E-mITXE Board
1.6.4
Reset Configuration Word
The reset configuration word (RCW) controls the clock ratios and other basic device functions such as PCI
host or agent mode, boot location, TSEC modes, and endian mode. The reset configuration word is divided
into reset configuration word lower (RCWL) and reset configuration word higher (RCWH) and is loaded
from the local bus during the power-on or hard reset flow. The default RCW low bit setting is
0x0404_0000. The default RCW high bit setting is 0xB460_A000.
The RCW is located at the lowest 64 bytes of the boot Flash memory, which is 0xFE00_0000 if the default
memory map is used.
Table 19. Default RCW in Flash Memory
Address
FE000000:
FE000010:
FE000020:
FE000030:
04040404
00000000
B4B4B4B4
A0A0A0A0
04040404
00000000
B4B4B4B4
A0A0A0A0
04040404
00000000
60606060
00000000
04040404
00000000
60606060
00000000
The RCW definitions are shown in Figure 24 and Figure 25 .
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Field
LBIUCM DDRCM
SPMF
COREPLL
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Field
Figure 24. Reset Configuration Word Low (RCWL) Bit Settings
0
1
2
3
4
5
6
7
8
9
10 11
12
13
14
15
Field PCIHOST PCI64 PCI1ABR PCI2ABR COREDIS BMS BOOTSEQ SWEN
ROMLOC
16
17
18
19
20
21
22
23
24
25 26 27
28
29
30
31
Field
TSEC1M
TSEC2M
TLE LALE LDP
Figure 25. Reset Configuration Word High (RCWH) Bit Settings
Table 20. RCWL Bit Descriptions
Bits
Name
Meaning
Description
0
LBIUCM
Local bus memory Local Bus Controller Clock: CSB_CLK
controller clock
0: Default ratio 1:1
mode
1: ratio 2:1
1
DDRCM
DDR SDRAM
memory controller
clock mode
DDR Controller Clock: CSB_CLK
0: Default
ratio 1:1
1:
ratio 2:1
MPC8349E-mITXE Reference Design Platform User’s Guide, Rev. 2
32
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
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