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| 型号： | MPC8378CVRANDA |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 266 MHz, MICROPROCESSOR, PBGA689 |
| 封装： | 31 X 31 MM, 2.46 MM HEIGHT, 1 MM PITCH, LEAD FREE, PLASTIC, BGA-689 |
| 文件页数： | 39/125页 |
| 文件大小： | 894K |
| 代理商： | MPC8378CVRANDA |
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MPC8378E PowerQUICC II Pro Processor Hardware Specifications, Rev. 5
Freescale Semiconductor
20
ADDR/CMD output hold with respect to MCK
400 MHz data rate
333 MHz data rate
266 MHz data rate
200 MHz data rate
tDDKHAX
1.95
2.40
3.15
4.20
—
ns
MCSn output setup with respect to MCK
400 MHz data rate
333 MHz data rate
266 MHz data rate
200 MHz data rate
tDDKHCS
1.95
2.40
3.15
4.20
—
ns
MCSn output hold with respect to MCK
400 MHz data rate
333 MHz data rate
266 MHz data rate
200 MHz data rate
tDDKHCX
1.95
2.40
3.15
4.20
—
ns
MCK to MDQS skew
tDDKHMH
–0.6
0.6
ns
MDQ//MDM output setup with respect to MDQS
400 MHz data rate
333 MHz data rate
266 MHz data rate
200 MHz data rate
tDDKHDS,
tDDKLDS
550
800
1100
1200
—
ps
MDQ//MDM output hold with respect to MDQS
400 MHz data rate
333 MHz data rate
266 MHz data rate
200 MHz data rate
tDDKHDX,
tDDKLDX
700
800
1100
1200
—
ps
MDQS preamble start
tDDKHMP
–0.5
t
MCK –0.6
–0.5
t
MCK +0.6
ns
MDQS epilogue end
tDDKHME
–0.6
0.6
ns
Notes:
1. The symbols used for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state) (reference)(state) for
inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. Output hold time can be read as DDR timing
(DD) from the rising or falling edge of the reference clock (KH or KL) until the output went invalid (AX or DX). For example,
tDDKHAS symbolizes DDR timing (DD) for the time tMCK memory clock reference (K) goes from the high (H) state until outputs
(A) are setup (S) or output valid time. Also, tDDKLDX symbolizes DDR timing (DD) for the time tMCK memory clock reference
(K) goes low (L) until data outputs (D) are invalid (X) or data output hold time.
2. All MCK/MCK referenced measurements are made from the crossing of the two signals ±0.1 V.
3. ADDR/CMD includes all DDR SDRAM output signals except MCK/MCK, MCS, and MDQ//MDM/MDQS.
4. Note that tDDKHMH follows the symbol conventions described in Note 1. For example, tDDKHMH describes the DDR timing
(DD) from the rising edge of the MCK[n] clock (KH) until the MDQS signal is valid (MH). tDDKHMH can be modified through
control of the DQSS override bits in the TIMING_CFG_2 register. This will typically be set to the same delay as the clock
adjust in the CLK_CNTL register. The timing parameters listed in the table assume that these 2 parameters have been set
to the same adjustment value. See the MPC8379E PowerQUICC II Pro Host Processor Reference Manual for a description
and understanding of the timing modifications enabled by use of these bits.
5. Determined by maximum possible skew between a data strobe (MDQS) and any corresponding bit of data MDQ, ECC, or
data mask (MDM). The data strobe should be centered inside of the data eye at the pins of the microprocessor.
6. All outputs are referenced to the rising edge of MCKn at the pins of the microprocessor. Note that tDDKHMP follows the
symbol conventions described in Note 1.
7. Clock Control register is set to adjust the memory clocks by 1/2 the applied cycle.
8. See AN3665, “MPC837xE Design Checklist,” for proper DDR termination.
Table 21. DDR1 and DDR2 SDRAM Output AC Timing Specifications (continued)
Parameter
Symbol1
Min
Max
Unit
Note
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MPC8378CVRANFA | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
| MPC8378CVRANG | 功能描述:微处理器 - MPU 837X W/O ENC PB-FREE RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| MPC8378CVRANGA | 功能描述:微处理器 - MPU 8378 PBGA XT PbFr No ENC RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| MPC8378CZQAFDA | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
| MPC8378CZQAFFA | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
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