参数资料
型号: MPC8379E-RDBA
厂商: Freescale Semiconductor
文件页数: 114/117页
文件大小: 0K
描述: BOARD REF DESIGN MPC8379E
标准包装: 1
系列: PowerQUICC II™ PRO
类型: MPU
适用于相关产品: MPC8379E
所含物品:
MPC8379E PowerQUICC II Pro Processor Hardware Specifications, Rev. 8
96
Freescale Semiconductor
Pull Down
B16, AH18
Notes:
1. This pin is an open drain signal. A weak pull-up resistor (1 k
Ω) should be placed on this pin to OVDD.
2. This pin is an open drain signal. A weak pull-up resistor (2–10 k
Ω) should be placed on this pin to OVDD.
3. This output is actively driven during reset rather than being released to high impedance during reset.
4. These JTAG pins have weak internal pull-up P-FETs that are always enabled.
5. This pin should have a weak pull up if the chip is in PCI host mode. Follow PCI Specification recommendation and see
AN3665, “MPC837xE Design Checklist,” for more details.
6. These are On Die Termination pins, used to control DDR2 memories internal termination resistance.
7. This pin must always be tied to GND using a 0
Ω resistor.
8. This pin must always be left not connected.
9. For DDR2 operation, it is recommended that MDIC0 be tied to GND using an 18.2
Ω resistor and MDIC1 be tied to DDR
power using an 18.2
Ω resistor.
10.This pin must always be tied low. If it is left floating it may cause the device to malfunction.
11.See AN3665, “MPC837xE Design Checklist,” for proper DDR termination.
12.This pin must not be pulled down during PORESET.
13.This pin must always be tied to GND.
14.This pin must always be tied to OVDD.
15.Open or tie to GND.
16.Voltage settings are dependent on the frequency used; see Table 3.
17.See AN3665, “MPC837xE Design Checklist,” for proper termination.
Table 69. TePBGA II Pinout Listing (continued)
Signal
Package Pin Number
Pin Type
Power Supply
Note
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