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| 型号： | MPC8379EVRAJFA |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 333 MHz, MICROPROCESSOR, PBGA689 |
| 封装： | 31 X 31 MM, 2.46 MM HEIGHT, 1 MM PITCH, LEAD FREE, PLASTIC, BGA-689 |
| 文件页数： | 11/114页 |
| 文件大小： | 1337K |
| 代理商： | MPC8379EVRAJFA |
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MPC8379E PowerQUICC II Pro Processor Hardware Specifications, Rev. 2
108
Freescale Semiconductor
System Design Information
RθJC = junction to case thermal resistance (°C/W)
PD = power dissipation (W)
24 System Design Information
This section provides electrical and thermal design recommendations for successful application of the
MPC8379E.
24.1
PLL Power Supply Filtering
Each of the PLLs listed above is provided with power through independent power supply pins. The AVDD
level should always be equivalent to VDD, and preferably these voltages will be derived directly from VDD
through a low frequency filter scheme.
There are a number of ways to reliably provide power to the PLLs, but the recommended solution is to
provide five independent filter circuits as illustrated in Figure 62, one to each of the five AVDD pins. By
providing independent filters to each PLL, the opportunity to cause noise injection from one PLL to the
other is reduced.
This circuit is intended to filter noise in the PLLs resonant frequency range from a 500 kHz to 10 MHz
range. It should be built with surface mount capacitors with minimum Effective Series Inductance (ESL).
Consistent with the recommendations of Dr. Howard Johnson in High Speed Digital Design: A Handbook
of Black Magic (Prentice Hall, 1993), multiple small capacitors of equal value are recommended over a
single large value capacitor.
Each circuit should be placed as close as possible to the specific AVDD pin being supplied to minimize
noise coupled from nearby circuits. It should be possible to route directly from the capacitors to the AVDD
pin, which is on the periphery of package, without the inductance of vias.
Figure 62 shows the PLL power supply filter circuit.
Figure 62. PLL Power Supply Filter Circuit
24.2
Decoupling Recommendations
Due to large address and data buses, and high operating frequencies, the device can generate transient
power surges and high frequency noise in its power supply, especially while driving large capacitive loads.
This noise must be prevented from reaching other components in the device system, and the device itself
requires a clean, tightly regulated source of power. Therefore, it is recommended that the system designer
place at least one decoupling capacitor at each VDD, OVDD, GVDD, and LVDD pins of the device. These
decoupling capacitors should receive their power from separate VDD, OVDD, GVDD, LVDD, and GND
power planes in the PCB, utilizing short traces to minimize inductance. Capacitors may be placed directly
under the device using a standard escape pattern. Others may surround the part.
VDD
AVDD (or L2AVDD)
2.2 F
GND
Low ESL Surface Mount Capacitors
10
Ω
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MPC8379EVRAJGA | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
| MPC8379EVRALDA | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
| MPC8379EVRALFA | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:PowerQUICC? II Pro Processor Hardware Specifications |
| MPC8379EVRALG | 功能描述:微处理器 - MPU PBGA W/ ENCR RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
| MPC8379EVRALGA | 功能描述:微处理器 - MPU 8379 PBGA ST PbFr W/ENC RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
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