参数资料
型号: MPC8536EBVTAULA
厂商: Freescale Semiconductor
文件页数: 67/126页
文件大小: 0K
描述: MPU PWRQUICC III 1333MHZ 783PBGA
产品培训模块: MPC8536E QUICC III Processor
标准包装: 1
系列: MPC85xx
处理器类型: 32-位 MPC85xx PowerQUICC III
速度: 1.333GHz
电压: 1V
安装类型: 表面贴装
封装/外壳: 783-BBGA,FCBGA
供应商设备封装: 783-FCPBGA(29x29)
包装: 托盘
其它名称: MPC8536EBVTAUL
MPC8536EBVTAUL-ND
Electrical Characteristics
MPC8536E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
Freescale Semiconductor
45
This figure shows the GMII transmit AC timing diagram.
Figure 16. GMII Transmit AC Timing Diagram
2.9.2.2.2
GMII Receive AC Timing Specifications
This table provides the GMII receive AC timing specifications.
This figure provides the AC test load for eTSEC.
Figure 17. eTSEC AC Test Load
Table 29. GMII Receive AC Timing Specifications
At recommended operating conditions with L/TVDD of 3.3 V ± 5%.
Parameter/Condition
Symbol 1
Min
Typ
Max
Unit
RX_CLK clock period
tGRX
—8.0
ns
RX_CLK duty cycle
tGRXH/tGRX
35
65
%
RXD[7:0], RX_DV, RX_ER setup time to RX_CLK
tGRDVKH
2.0
ns
RXD[7:0], RX_DV, RX_ER hold time to RX_CLK
tGRDXKH
0—
ns
RX_CLK clock rise (20%-80%)
tGRXR
——
1.0
ns
RX_CLK clock fall time (80%-20%)
tGRXF
——
1.0
ns
Note:
1. The symbols used for timing specifications herein follow the pattern of t(first two letters of functional block)(signal)(state) (reference)(state)
for inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tGRDVKH symbolizes GMII
receive timing (GR) with respect to the time data input signals (D) reaching the valid state (V) relative to the tRX clock
reference (K) going to the high state (H) or setup time. Also, tGRDXKL symbolizes GMII receive timing (GR) with respect to the
time data input signals (D) went invalid (X) relative to the tGRX clock reference (K) going to the low (L) state or hold time. Note
that, in general, the clock reference symbol representation is based on three letters representing the clock of a particular
functional. For example, the subscript of tGRX represents the GMII (G) receive (RX) clock. For rise and fall times, the latter
convention is used with the appropriate letter: R (rise) or F (fall).
GTX_CLK
TXD[7:0]
tGTKHDX
tGTX
tGTXH
tGTXR
tGTXF
tGTKHDV
TX_EN
TX_ER
Output
LVDD/2
RL = 50 Ω
Z0 = 50 Ω
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