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参数资料
型号： MPC8540CPXAQFC
厂商： FREESCALE SEMICONDUCTOR INC
元件分类： 微控制器/微处理器
英文描述： 32-BIT, 667 MHz, MICROPROCESSOR, PBGA783
封装： 29 X 29 MM, 3.75 MM HEIGHT, 1 MM PITCH, FLIP CHIP, PLASTIC, BGA-783
文件页数： 83/104页
文件大小： 1353K
代理商： MPC8540CPXAQFC
MPC8540 Integrated Processor Hardware Specifications, Rev. 4
8
Freescale Semiconductor
Electrical Characteristics
2.1 Overall DC Electrical Characteristics
This section covers the ratings, conditions, and other characteristics.
2.1.1 Absolute Maximum Ratings
Table 1 provides the absolute maximum ratings.
Table 1. Absolute Maximum Ratings 1
Characteristic
Symbol
Max Value
Unit
Notes
Core supply voltage
For devices rated at 667 and 833 MHz
For devices rated at 1 GHz
VDD
–0.3 to 1.32
–0.3 to 1.43
V
PLL supply voltage
For devices rated at 667 and 833 MHz
For devices rated at 1 GHz
AVDD
–0.3 to 1.32
–0.3 to 1.43
V
DDR DRAM I/O voltage
GVDD
–0.3 to 3.63
V
Three-speed Ethernet I/O voltage
LVDD
–0.3 to 3.63
–0.3 to 2.75
V
PCI/PCI-X, local bus, RapidIO, 10/100 Ethernet, MII
management, DUART, system control and power
management, I2C, and JTAG I/O voltage
OVDD
–0.3 to 3.63
V
3
Input voltage
DDR DRAM signals
MVIN
–0.3 to (GVDD + 0.3)
V
2, 5
DDR DRAM reference
MVREF
–0.3 to (GVDD + 0.3)
V
2, 5
Three-speed Ethernet signals
LVIN
–0.3 to (LVDD + 0.3)
V
4, 5
PCI/PCI-X, Local bus, RapidIO,
10/100 Ethernet, DUART,
SYSCLK, system control and
power management, I2C, and
JTAG signals
OVIN
–0.3 to (OVDD + 0.3)
V
5
Storage temperature range
TSTG
–55 to 150
C
Notes:
1.Functional and tested operating conditions are given in Table 2. Absolute maximum ratings are stress
ratings only, and functional operation at the maximums is not guaranteed. Stresses beyond those listed
may affect device reliability or cause permanent damage to the device.
2.Caution: MVIN must not exceed GVDD by more than 0.3 V. This limit may be exceeded for a maximum of
20 ms during power-on reset and power-down sequences.
3.Caution: OVIN must not exceed OVDD by more than 0.3 V. This limit may be exceeded for a maximum of 20
ms during power-on reset and power-down sequences.
4.Caution: LVIN must not exceed LVDD by more than 0.3 V. This limit may be exceeded for a maximum of 20
ms during power-on reset and power-down sequences.
5.(M,L,O)VIN and MVREF may overshoot/undershoot to a voltage and for a maximum duration as shown in
Figure 2.
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