参数资料
型号: MPC8544ECVTAQJB
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 1000 MHz, RISC PROCESSOR, PBGA783
封装: 29 X 29 MM, 1 MM PITCH, LEAD FREE, PLASTIC, BGA-783
文件页数: 44/120页
文件大小: 1321K
代理商: MPC8544ECVTAQJB
MPC8544E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 2
Freescale Semiconductor
3
MPC8544E Overview
— Four banks of memory supported, each up to 4 Gbytes, to a maximum of 16 Gbytes
— DRAM chip configurations from 64 Mbits to 4 Gbits with x8/x16 data ports
— Full ECC support
— Page mode support
– Up to 16 simultaneous open pages for DDR
– Up to 32 simultaneous open pages for DDR2
— Contiguous or discontiguous memory mapping
— Sleep mode support for self-refresh SDRAM
— On-die termination support when using DDR2
— Supports auto refreshing
— On-the-fly power management using CKE signal
— Registered DIMM support
— Fast memory access via JTAG port
— 2.5-V SSTL_2 compatible I/O (1.8-V SSTL_1.8 for DDR2)
Programmable interrupt controller (PIC)
— Programming model is compliant with the OpenPIC architecture.
— Supports 16 programmable interrupt and processor task priority levels
— Supports 12 discrete external interrupts
— Supports 4 message interrupts with 32-bit messages
— Supports connection of an external interrupt controller such as the 8259 programmable
interrupt controller
— Four global high resolution timers/counters that can generate interrupts
— Supports a variety of other internal interrupt sources
— Supports fully nested interrupt delivery
— Interrupts can be routed to external pin for external processing.
— Interrupts can be routed to the e500 core’s standard or critical interrupt inputs.
— Interrupt summary registers allow fast identification of interrupt source.
Integrated security engine (SEC) optimized to process all the algorithms associated with IPSec,
IKE, WTLS/WAP, SSL/TLS, and 3GPP
— Four crypto-channels, each supporting multi-command descriptor chains
Dynamic assignment of crypto-execution units via an integrated controller
Buffer size of 256 bytes for each execution unit, with flow control for large data sizes
— PKEU—public key execution unit
– RSA and Diffie-Hellman; programmable field size up to 2048 bits
– Elliptic curve cryptography with F2m and F(p) modes and programmable field size up to
511 bits
— DEU—Data Encryption Standard execution unit
– DES, 3DES
相关PDF资料
PDF描述
MPC8544ECVTANFB 32-BIT, 800 MHz, RISC PROCESSOR, PBGA783
MPC8544VTALFB 32-BIT, 667 MHz, RISC PROCESSOR, PBGA783
MPC8544VTAQJB 32-BIT, 1000 MHz, RISC PROCESSOR, PBGA783
MPC8544VTALJB 32-BIT, 667 MHz, RISC PROCESSOR, PBGA783
MPC8544CVTARFB 32-BIT, 1067 MHz, RISC PROCESSOR, PBGA783
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