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| 型号： | MPC92469AC |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 13/13页 |
| 文件大小： | 0K |
| 描述： | IC SYNTHESIZER LVPECL 32-LQFP |
| 标准包装： | 250 |
| 类型： | 时钟/频率合成器 |
| PLL： | 是 |
| 输入： | 晶体 |
| 输出： | LVPECL |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:1 |
| 差分 - 输入:输出： | 无/是 |
| 频率 - 最大： | 400MHz |
| 除法器/乘法器： | 是/无 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-LQFP |
| 供应商设备封装： | 32-TQFP（7x7） |
| 包装： | 托盘 |
MPC92469 Data Sheet
400MHZ, LOW VOLTAGE, PECL CLOCK SYNTHESIZER W/SPREAD SPECTRUM
MPC92469 REVISION 4 FEBRUARY 6, 2013
9
2013 Integrated Device Technology, Inc.
Spread Spectrum Modulation
The MPC92469 offers the option of a spread spectrum (SSM)
output clock and is controlled by four bits in the serial load bit
stream. These four bits configure the SSM to be enabled, the type
of spread and the amount of spread modulation to be selected.
Table 11 shows the definition of these four bits. These spread
control bits are located at the beginning of the serial data stream
and are labeled SS3, SS2, SS1 and SS0. The initial state of these
four bits (SS3:SS0) is 0000 which places the MPC92469 in the
configuration of SSM being off. Any parallel load operation will
also result in the spread spectrum modulation programming being
reset to the value 0000 which likewise turns spread spectrum
modulation off. The MPC92469 offers down-spread or center
spread.
Figure 4 and Figure 5 show the amount of spread based upon
both the VCO frequency and the Spread Spectrum control bit
pattern. Figure 4 is for down-spread with 0% spread being at the
top of the figure. Figure 5 is for center-spread with 0% spread in
the middle of the figure. Increasing values of SS2:SS0 increase
the amount of spread and SS3 is used to configure either center-
spread (SS3=0) or down-spread (SS3=1). Note, for both tables,
the horizontal axis is the VCO frequency which ranges from
400MHz to 800MHz. The VCO frequency is 2X the output
frequency which corresponds to an output frequency range of
200MHz to 400MHz for the output divider of N=1.
Table 11. SSM Operation
Power Supply Filtering
The MPC92469 is a mixed analog/digital product. Its analog
circuitry is naturally susceptible to random noise, especially if this
noise is seen on the power supply pins. Random noise on the
VCC_PLL pin impacts the device characteristics. The MPC92469
provides separate power supplies for the digital circuitry (VCC) and
the internal PLL (VCC_PLL) of the device. The purpose of this
design technique is to try and isolate the high switching noise
digital outputs from the relatively sensitive internal analog phase-
locked loop. In a controlled environment such as an evaluation
board, this level of isolation is sufficient. However, in a digital
system environment where it is more difficult to minimize noise on
the power supplies a second level of isolation may be required.
The simplest form of isolation is a power supply filter on the
power supply filter scheme. The MPC92469 is most susceptible to
noise with spectral content in the 1 kHz to 1 MHz range.
Therefore, the filter should be designed to target this range. The
key parameter that needs to be met in the final filter design is the
DC voltage drop that will be seen between the VCC supply and the
VCC_PLL pin of the MPC92469. From the data sheet, the VCC_PLL
current (the current sourced through the VCC_PLL pin) is maximum
8 mA, assuming that a minimum of 3.0 V must be maintained on
resistance of 10-15
to meet the voltage drop criteria. The RC
filter pictured will provide a broadband filter with approximately
100:1 attenuation for noise whose spectral content is above
20 kHz. As the noise frequency crosses the series resonant point
of an individual capacitor its overall impedance begins to look
inductive and thus increases with increasing frequency. The
parallel capacitor combination shown ensures that a low
impedance path to ground exists for frequencies well above the
bandwidth of the PLL.
Figure 6. VCC_PLL Power Supply Filter
Additional noise suppression may be achieved with the use of
a ferrite chip bead. The ferrite chip bead offers a high value of RF
impedance while maintaining a very low DC resistance. Ferrite
beads are available from 15
to over 1k RF impedance
(measured @ 100 MHz), but would have DC resistance values of
less than 1
. Max current ratings range from a few hundred mA
to over 1 A. The selected bead should have a max current rating
well in excess of the actual circuit requirements preventing
saturation of the ferrite material. The ferrite chip bead is placed in
series with a low value resistor as shown in Figure 7. Capacitor
values should be staggered in value by a factor of 5 to 10. Proper
curcuit modeling should be performed to optimize circuit
components in specific user applications.
Figure 7. VCC_PLL Power Supply Filter Using a
Ferrite Bead
Using the On-Board Crystal Oscillator
The MPC92469 features a fully integrated Pierce oscillator to
minimize system implementation costs. The MPC92469 may be
operated with a 12 MHz to 20 MHz crystal and without additional
components. Recommended operation for the crystal should be of
SS Bit Pattern
Operation
SS3
SS2
SS1
SS0
Mode
00
0
off
0
1
0
1
center-spread
(increasing amount)
10
0
off
1
0
1
1
down-spread
(increasing amount)
VCC_PLL
VCC
MPC92469
C1, C2 = 0.01...0.1 F
VCC
CF = 22 F
RF = 10-15
C2
C1
0.0047 -0.022 f
10 -25 f
0.047 - 0.1 f
Pins 4 & 5
VCC_PLL
3.3V bulk
board
capacitance
1 -2 ohms
120 – 600 ohm
Ferrite Bead
3.3V+-5%
MPC92469
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