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参数资料
| 型号： | MPC93H52AC |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 1/14页 |
| 文件大小： | 0K |
| 描述： | IC CLK GEN ZD 1:11 32-LQFP |
| 标准包装： | 250 |
| 类型： | PLL 时钟发生器 |
| PLL： | 带旁路 |
| 输入： | LVCMOS |
| 输出： | LVCMOS |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:11 |
| 差分 - 输入:输出： | 无/无 |
| 频率 - 最大： | 240MHz |
| 除法器/乘法器： | 是/无 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-LQFP |
| 供应商设备封装： | 32-TQFP（7x7） |
| 包装： | 托盘 |
DATASHEET
3.3 V 1:11 LVCMOS Zero Delay
Clock Generator
MPC93H52
NRND
NRND – Not Recommend for New Designs
MPC93H52 REVISION 5 FEBRUARY 15, 2013
1
2013 Integrated Device Technology, Inc.
The MPC93H52 is a 3.3 V compatible, 1:11 PLL based clock generator
targeted for high performance clock tree applications. With output frequencies up
to 240 MHz and output skews lower than 200 ps the device meets the needs of
most demanding clock applications.
Features
Configurable 11 Outputs LVCMOS PLL Clock Generator
Fully Integrated PLL
Wide Range of Output Clock Frequency of 16.67 MHz to 240 MHz
Multiplication of the Input Reference Clock Frequency by 3, 2, 1, 3
2, 23,
1
3 and 12
3.3 V LVCMOS Compatible
Maximum Output Skew of 200 ps
Supports Zero-Delay Applications
Designed for High-Performance Telecom, Networking and Computing
Applications
32-Lead LQFP Package
32-Lead Pb-free Package Available
Ambient Temperature Range — 0°C to +70°C
Pin and Function Compatible to the MPC952
Not Recommend for New Designs
Functional Description
The MPC93H52 is a fully 3.3 V compatible PLL clock generator and clock driv-
er. The device has the capability to generate output clock signals of 16.67 to 240
MHz from external clock sources. The internal PLL is optimized for its frequency
range and does not require external lock filter components. One output of the MPC93H52 has to be connected to the PLL feed-
back input FB_IN to close the external PLL feedback path. The output divider of this output setting determines the PLL frequency
multiplication factor. This multiplication factor, F_RANGE, and the reference clock frequency must be selected to situate the VCO
in its specified lock range. The frequency of the clock outputs can be configured individually for all three output banks by the
FSELx pins supporting systems with different but phase-aligned clock frequencies.
The PLL of the MPC93H52 minimizes the propagation delay and, therefore, supports zero-delay applications. All inputs and
outputs are LVCMOS compatible. The outputs are optimized to drive parallel terminated 50
transmission lines. Alternatively,
each output can drive up to two series terminated transmission lines giving the device an effective fanout of 22.
The device also supports output high-impedance disable and a PLL bypass mode for static system test and diagnosis. The
MPC93H52 is package in a 32-lead LQFP.
FA SUFFIX
32-LEAD LQFP PACKAGE
CASE 873A-03
AC SUFFIX
32-LEAD LQFP PACKAGE
Pb-FREE PACKAGE
CASE 873A-03
MPC93H52
LOW VOLTAGE
3.3 V LVCMOS 1:11
CLOCK GENERATOR
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MPC93H52ACR2 | 功能描述:IC CLK GEN ZD 1:11 32-LQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| MPC93H52FA | 功能描述:IC CLOCK GEN/DVR HI-DRIVE 32LQFP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:39 系列:- 类型:* PLL:带旁路 输入:时钟 输出:时钟 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 频率 - 最大:170MHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:* 封装/外壳:* 供应商设备封装:* 包装:* |
| MPC93H52FAR2 | 制造商:Integrated Device Technology Inc 功能描述:ZERO DLY PLL CLOCK GEN SGL 32LQFP - Tape and Reel |
| MPC93R51 | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:LOW VOLTAGE PLL CLOCK DRIVER |
| MPC93R51AC | 功能描述:时钟驱动器及分配 3.3V 240MHz Clock Generator RoHS:否 制造商:Micrel 乘法/除法因子:1:4 输出类型:Differential 最大输出频率:4.2 GHz 电源电压-最大: 电源电压-最小:5 V 最大工作温度:+ 85 C 封装 / 箱体:SOIC-8 封装:Reel |
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