参数资料
型号: MPC9600FA
厂商: MOTOROLA INC
元件分类: 时钟及定时
英文描述: PLL BASED CLOCK DRIVER, 21 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP48
封装: PLASTIC, LQFP-48
文件页数: 3/12页
文件大小: 180K
代理商: MPC9600FA
MPC9600
MOTOROLA ADVANCED CLOCK DRIVERS DEVICE DATA
184
The Following Figures Illustrate the Measurement Reference for the MPC9600 Clock Driver Circuit
Figure 11. CCLK MPC9600 AC test reference
Figure 12. PCLK MPC9600 AC test reference
Pulse
Generator
Z = 50 W
RT = 50
ZO = 50
RT = 50
ZO = 50
MPC9600 DUT
VTT
Differential
Pulse Generator
Z = 50 W
RT = 50
ZO = 50
RT = 50
ZO = 50
MPC9600 DUT
VTT
Figure 13. Propagation delay t(), static phase
offset) test reference
Figure 14. Propagation delay t() test reference
Figure 15. Output Duty Cycle (DC)
Figure 16. Output–to–output Skew tSK(O)
The pin-to-pin skew is defined as the worst case difference in
propagation delay between any similar delay path within a
single device
The time from the PLL controlled edge to the non controlled
edge, divided by the time between PLL controlled edges,
expressed as a percentage
VCC
VCCB2
GND
VCC
VCCB2
GND
tSK(O)
VCC
VCCB2
GND
tP
T0
DC = tP/T0 x 100%
VCC
VCCB2
GND
VCC
VCCB2
GND
t()
CCLK
FB_IN
VCC
VCCB2
GND
t()
PCLK
FB_IN
PCLK
VPP
VCMR
2
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