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| 型号： | MPC9608AC |
| 厂商： | IDT, Integrated Device Technology Inc |
| 文件页数： | 7/13页 |
| 文件大小： | 0K |
| 描述： | IC CLOCK BUFFER ZD 1:10 32-LQFP |
| 标准包装： | 250 |
| 类型： | 零延迟缓冲器 |
| PLL： | 带旁路 |
| 输入： | LVCMOS |
| 输出： | LVCMOS |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:10 |
| 差分 - 输入:输出： | 无/无 |
| 频率 - 最大： | 200MHz |
| 除法器/乘法器： | 是/无 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-LQFP |
| 供应商设备封装： | 32-TQFP（7x7） |
| 包装： | 托盘 |
MPC9608 REVISION 4 JANUARY 7, 2013
3
2013 Integrated Device Technology, Inc.
MPC9608 Data Sheet
1:10 LVCMOS ZERO DELAY CLOCK BUFFER
Table 1. Pin Configuration
Pin
I/O
Type
Function
CCLK
Input
LVCMOS
PLL reference clock signal
FB_IN
Input
LVCMOS
PLL feedback signal input, connect to a QFB output
F_RANGE[0:1]
Input
LVCMOS
PLL frequency range select
BSEL
Input
LVCMOS
Frequency divider select for bank B outputs
PLL_EN
Input
LVCMOS
PLL enable/disable
OE
Input
LVCMOS
Output enable/disable (high-impedance tristate)
CLK_STOP
Input
LVCMOS
Synchronous clock enable/stop
QA0-4, QB0-4
Output
LVCMOS
Clock outputs
QFB
Output
LVCMOS
PLL feedback signal output. Connect to FB_IN
GND
Supply
Ground
Negative power supply
VCCA
Supply
VCC
PLL positive power supply (analog power supply). The MPC9608 requires an external RC filter
for the analog power supply pin VCCA. Refer to the Applications Information section for details.
VCC
Supply
VCC
Positive power supply for I/O and core
Table 2. Function Table
Control
Default
0
1
F_RANGE[0:1]
00
PLL frequency range. Refer to Table 3. Clock Frequency Configuration for QFB Connected to FB_INT
BSEL
0
fQB0-4 = fQA0-4
fQB0-4 = fQA0-4 2
CLK_STOP
0
Outputs enabled
Outputs synchronously stopped in logic low state
OE
0
Outputs enabled (active)
Outputs disabled (high-impedance state), independent on
CLK_STOP. Applying OE = 1 and PLL_EN = 1 resets the device.
The PLL feedback output QFB is not affected by OE.
PLL_EN
0
Normal operation mode with PLL enabled.
Test mode with PLL disabled. CCLK is substituted for the internal
VCO output. MPC9608 is fully static and no minimum frequency
limit applies. All PLL related AC characteristics are not applicable.
Applying OE = 1 and PLL_EN = 1 resets the device.
Table 3. Clock Frequency Configuration for QFB Connected to FB_IN
F_RANGE[0]
F_RANGE[1]
BSEL
fREF (CCLK)
range [MHz]
QA0-QA4
QB0-B4
QFB
Ratio
fQA0-4 [MHz]
Ratio
fQB0-4 [MHz]
0
100.0 – 200.0
fREF
100.0 – 200.0
fREF
100.0 – 200.0
fREF
00
1
fREF 2
50.0 – 25.0
fREF
0
1
0
50.0 – 100.0
fREF
50.0 – 100.0
fREF
50.0 – 100.0
fREF
01
1
fREF 2
25.0 – 50.0
fREF
1
0
25.0 – 50.0
fREF
25.0 – 50.0
fREF
25.0 – 50.0
fREF
10
1
fREF 2
12.5 – 25.0
fREF
1
0
12.5 – 25.0
fREF
12.5–25
fREF
12.5 – 25.0
fREF
11
1
fREF 2
6.25 – 12.5
fREF
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相关代理商/技术参数 |
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| MPC9608ACR2 | 功能描述:时钟缓冲器 RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| MPC9608FA | 功能描述:时钟缓冲器 3.3V 200MHz Clock Generator RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| MPC9608FAR2 | 制造商:Integrated Device Technology Inc 功能描述:ZERO DLY PLL CLOCK BFFR SGL 32LQFP - Tape and Reel |
| MPC961C | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:LOW VOLTAGE ZERO DELAY BUFFER |
| MPC961CAC | 功能描述:时钟缓冲器 RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
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