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参数资料
| 型号： | MPC9772FA |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 230 MHz, OTHER CLOCK GENERATOR, PQFP52 |
| 封装： | LQFP-52 |
| 文件页数： | 10/16页 |
| 文件大小： | 833K |
| 代理商： | MPC9772FA |
IDT / ICS 3.3V 1:12 LVCMOS PLL CLOCK GENERATOR
3
MPC9772 REV 6 FEBRUARY 7, 2007
MPC9772
3.3V 1:12 LVCMOS PLL CLOCK GENERATOR
Table 1. Pin Configuration
Pin
I/O
Type
Function
CCLK0
Input
LVCMOS PLL reference clock
CCLK1
Input
LVCMOS Alternative PLL reference clock
XTAL_IN, XTAL_OUT
Analog
Crystal oscillator interface
FB_IN
Input
LVCMOS PLL feedback signal input, connect to an QFB
CCLK_SEL
Input
LVCMOS LVCMOS clock reference select
REF_SEL
Input
LVCMOS LVCMOS/PECL reference clock select
VCO_SEL
Input
LVCMOS VCO operating frequency select
PLL_EN
Input
LVCMOS PLL enable/PLL bypass mode select
MR/OE
Input
LVCMOS Output enable/disable (high-impedance tristate) and device reset
FSEL_A[0:1]
Input
LVCMOS Frequency divider select for bank A outputs
FSEL_B[0:1]
Input
LVCMOS Frequency divider select for bank B outputs
FSEL_C[0:1]
Input
LVCMOS Frequency divider select for bank C outputs
FSEL_FB[0:2]
Input
LVCMOS Frequency divider select for the QFB output
INV_CLK
Input
LVCMOS Clock phase selection for outputs QC2 and QC3
STOP_CLK
Input
LVCMOS Clock input for clock stop circuitry
STOP_DATA
Input
LVCMOS Configuration data input for clock stop circuitry
QA[0-3]
Output
LVCMOS Clock outputs (Bank A)
QB[0-3]
Output
LVCMOS Clock outputs (Bank B)
QC[0-3]
Output
LVCMOS Clock outputs (Bank C)
QFB
Output
LVCMOS PLL feedback output. Connect to FB_IN.
QSYNC
Output
LVCMOS Synchronization pulse output
GND
Supply
Ground
Negative power supply
VCC_PLL
Supply
VCC
PLL positive power supply (analog power supply). It is recommended to use an external RC
filter for the analog power supply pin VCC_PLL. Please see applications section for details.
VCC
Supply
VCC
Positive power supply for I/O and core. All VCC pins must be connected to the positive power
supply for correct operation
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MPC9772FAR2 | 功能描述:时钟发生器及支持产品 FSL 1-12 LVCMOS PLL Clock Generator, xta RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| MPC9773 | 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:3.3 V 1:12 LVCMOS PLL Clock Generator |
| MPC9773AE | 功能描述:时钟发生器及支持产品 FSL 1-12 LVCMOS/LVPE CL to LVCMOS PLL Clo RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| MPC9773AER2 | 功能描述:时钟发生器及支持产品 FSL 1-12 LVCMOS/LVPE CL to LVCMOS PLL Clo RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| MPC9773FA | 功能描述:锁相环 - PLL 3.3V 240MHz Clock Generator RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
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