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| 型号： | MPC9774AE |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 时钟及定时 |
| 英文描述： | 9774 SERIES, PLL BASED CLOCK DRIVER, 14 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52 |
| 封装： | PLASTIC, LQFP-52 |
| 文件页数： | 10/10页 |
| 文件大小： | 186K |
| 代理商： | MPC9774AE |
MPC9774
232
FREESCALE SEMICONDUCTOR ADVANCED CLOCK DRIVERS DEVICE DATA
Power Supply Filtering
The MPC9774 is a mixed analog/digital product. Its analog
circuitry is naturally susceptible to random noise, especially if
this noise is seen on the power supply pins. Random noise on
the VCC_PLL power supply impacts the device characteristics,
for instance I/O jitter. The MPC9774 provides separate power
supplies for the output buffers (VCC) and the phase-locked loop
(VCC_PLL) of the device.The purpose of this design technique is
to isolate the high switching noise digital outputs from the
relatively sensitive internal analog phase-locked loop. In a
digital system environment where it is more difficult to minimize
noise on the power supplies a second level of isolation may be
required. The simple but effective form of isolation is a power
illustrates a typical power supply filter scheme. The MPC9774
frequency and phase stability is most susceptible to noise with
spectral content in the 100 kHz to 20 MHz range. Therefore, the
filter should be designed to target this range. The key
parameter that needs to be met in the final filter design is the DC
voltage drop across the series filter resistor RF. From the data
sheet the ICC_PLL current (the current sourced through the
VCC_PLL pin) is typically 5 mA (7.5 mA maximum), assuming
that a minimum of 3.02 V (VCC_PLL, min) must be maintained on
a resistance of 5–15
to meet the voltage drop criteria.
The minimum values for RF and the filter capacitor CF are
defined by the required filter characteristics: the RC filter
should provide an attenuation greater than 40 dB for noise
whose spectral content is above 100 kHz. In the example, RC
filter shown in Figure 11, the filter cut-off frequency is around
3–5 kHz and the noise attenuation at 100 kHz is better than
42 dB.
Figure 11. VCC_PLL Power Supply Filter
As the noise frequency crosses the series resonant point of
an individual capacitor its overall impedance begins to look
inductive and thus increases with increasing frequency. The
parallel capacitor combination shown ensures that a low
impedance path to ground exists for frequencies well above the
bandwidth of the PLL. Although the MPC9774 has several
design features to minimize the susceptibility to power supply
noise (isolated power and grounds and fully differential PLL)
there still may be applications in which overall performance is
being degraded due to system power supply noise. The power
supply filter schemes discussed in this section should be
adequate to eliminate power supply noise related problems in
most designs.
Figure 12. CCLK MPC9774 AC Test Reference
VCC_PLL
VCC
MPC9774
10 nF
RF = 5–15
CF
33...100 nF
RF
VCC
CF = 22 F
Pulse
Generator
Z = 50
RT = 50
Z = 50
RT = 50
Z = 50
MPC9774 DUT
VTT
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MPC9774AER2 | 功能描述:IC PLL CLK GEN 1:14 3.3V 52-LQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| MPC9774FA | 功能描述:锁相环 - PLL 3.3V 125MHz Clock Generator RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
| MPC9774FAR2 | 功能描述:时钟发生器及支持产品 FSL 1-14 LVCMOS PLL Clock Generator RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| MPC97H73AE | 功能描述:IC PLL CLK GEN 1:12 3.3V 52-LQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
| MPC97H73AER2 | 功能描述:IC PLL CLK GEN 1:12 3.3V 52-LQFP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:1,000 系列:- 类型:时钟/频率合成器，扇出分配 PLL:- 输入:- 输出:- 电路数:- 比率 - 输入:输出:- 差分 - 输入:输出:- 频率 - 最大:- 除法器/乘法器:- 电源电压:- 工作温度:- 安装类型:表面贴装 封装/外壳:56-VFQFN 裸露焊盘 供应商设备封装:56-VFQFP-EP（8x8） 包装:带卷 (TR) 其它名称:844S012AKI-01LFT |
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