参数资料
型号: MRF1535FNT1
厂商: Freescale Semiconductor
文件页数: 10/19页
文件大小: 658K
描述: IC MOSFET RF N-CHAN TO272-6
标准包装: 500
晶体管类型: LDMOS
频率: 520MHz
增益: 13.5dB
电压 - 测试: 12.5V
额定电流: 6A
电流 - 测试: 500mA
功率 - 输出: 35W
电压 - 额定: 40V
封装/外壳: TO-272BA
供应商设备封装: TO-272-6 绕接
包装: 带卷 (TR)
18
RF Device Data
Freescale Semiconductor
MRF1535NT1 MRF1535FNT1
PRODUCT DOCUMENTATION, TOOLS AND SOFTWARE
Refer to the following documents to aid your design process.
Application Notes
?
AN211A: Field Effect Transistors in Theory and Practice
?
AN215A: RF Small-Signal Design Using Two-Port Parameters
?
AN721: Impedance Matching Networks Applied to RF Power Transistors
?
AN1907: Solder Reflow Attach Method for High Power RF Devices in Plastic Packages
?
AN3263: Bolt Down Mounting Method for High Power RF Transistors and RFICs in Over-Molded Plastic Packages
?
AN3789: Clamping of High Power RF Transistors and RFICs in Over-Molded Plastic Packages
Engineering Bulletins
?
EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
?
Electromigration MTTF Calculator
For Software and Tools, do a Part Number search at http://www.freescale.com, and select the ?Part Number? link. Go to the
Software & Tools tab on the part?s Product Summary page to download the respective tool.
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
Description
11
Feb. 2008
?
Changed DC Bias IDQ
value from 150 to 500 to match Functional Test I
DQ
specification, p. 10
?
Replaced Case Outline 1264-09 with 1264-10, Issue L, p. 1, 12-14. Removed Drain-ID label from top
view and View Y-Y. Corrected cross hatch pattern and its dimensions (D2 and E2) on source contact.
Renamed E2 with E3. Added Pin 7 designation. Corrected positional tolerance for bolt hole radius. Added
JEDEC Standard Package Number.
?
Replaced Case Outline 1264A-02 with 1264A-03, Issue D, p. 1, 15-17. Removed Drain-ID label from
View Y-Y. Corrected cross hatch pattern and its dimensions (D2 and E2) on source contact (Changed D2
and E2 dimensions from basic to .604 Min and .162 Min, respectively). Added dimension E3. Added Pin 7
designation. Corrected positional tolerance for bolt hole radius. Added JEDEC Standard Package Number.
?
Added Product Documentation and Revision History, p. 18
12
June 2008
?
Corrected specified performance values for power gain and efficiency on p. 1 to match typical
performance values in the functional test table on p. 2
13
June 2009
?
Modified data sheet to reflect MSL rating change from 1 to 3 as a result of the standardization of packing
process as described in Product and Process Change Notification number, PCN13516, p. 1
?
Added AN1907, Solder Reflow Attach Method for High Power RF Devices in Plastic Packages and
AN3789, Clamping of High Power RF Transistors and RFICs in Over-Molded Plastic Packages to Product
Documentation, Application Notes, p. 18
?
Added Electromigration MTTF Calculator availability to Product Software, p. 18
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