参数资料
型号: MSC1214Y3PAGRG4
厂商: TEXAS INSTRUMENTS INC
元件分类: 微控制器/微处理器
英文描述: 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP64
封装: GREEN, PLASTIC, TQFP-64
文件页数: 103/111页
文件大小: 1102K
代理商: MSC1214Y3PAGRG4
MSC1211, MSC1212
MSC1213,MSC1214
SBAS323G JUNE 2004 REVISED OCTOBER 2007
www.ti.com
91
ADC Control 0 (ADCON0)
7
6
5
4
3
2
1
0
Reset Value
SFR DCh
REFCLK
BOD
EVREF
VREFH
EBUF
PGA2
PGA1
PGA0
30h
REFCLK
Reference Clock. The reference is specified with a 250kHz clock. The REFCLK should be selected by choosing
bit 7
the appropriate source so that it does not exceed 250kHz.
0
+
t
CLK
(ACLK
) 1) * 4
1
+ USEC
4
BOD
Burnout Detect. When enabled this connects a positive current source to the positive channel and a negative
bit 6
current source to the negative channel. If the channel is open circuit then the ADC results will be full-scale. Used with
Buffer ON.
0 = Burnout Current Sources Off (default).
1 = Burnout Current Sources On.
EVREF
Enable Internal Voltage Reference. If the internal voltage reference is not used, it should be turned off to save power
bit 5
and reduce noise.
0 = Internal Voltage Reference Off.
1 = Internal Voltage Reference On (default). REF IN should be connected to AGND in this mode. REF IN+ should
have a 0.1
F capacitor.
VREFH
Voltage Reference High Select. The internal voltage reference can be selected to be 2.5V or 1.25V.
bit 4
0 = REFOUT/REF IN+ is 1.25V.
1 = REFOUT/REF IN+ is 2.5V (default).
EBUF
Enable Buffer. Enable the input buffer to provide higher input impedance but limits the input voltage range and
bit 3
dissipates more power.
0 = Buffer disabled (default).
1 = Buffer enabled.
PGA20
Programmable Gain Amplifier. Sets the gain for the PGA from 1 to 128.
bits 20
PGA2
PGA1
PGA0
GAIN
0
1 (default)
0
1
2
0
1
0
4
0
1
8
1
0
16
1
0
1
32
1
0
64
1
128
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