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参数资料
| 型号： | MSC1214Y3PAGRG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP64 |
| 封装： | GREEN, PLASTIC, TQFP-64 |
| 文件页数： | 66/111页 |
| 文件大小： | 1102K |
| 代理商： | MSC1214Y3PAGRG4 |
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MSC1211, MSC1212
MSC1213,MSC1214
SBAS323G JUNE 2004 REVISED OCTOBER 2007
www.ti.com
58
I2C Control (I2CCON) (Available only on the MSC1211 and MSC1213)
7
6
5
4
3
2
1
0
Reset Value
SFR 9Ah
START
STOP
ACK
0
FAST
MSTR
SCLS
FILEN
00h
START
Start Condition (Master mode).
bit 7
Read: Current status of start condition or repeated start condition.
Write: When operating as a master, a start condition is transmitted when the START bit is set to 1. During a data
transfer, if the START bit is set, a repeated start is transmitted after the current data transfer is complete. If no transfer
is in progress when the START and STOP bits are set simultaneously, a START will be followed by a STOP.
STOP
Stop Condition (Master mode).
bit 6
Read: Current status of stop condition.
Write: Setting STOP to logic 1 causes a stop condition to be transmitted. When a stop condition is received, hardware
clears STOP to logic 0. If both START and STOP are set during a transfer, a stop condition is transmitted followed
by a start condition.
ACK
Acknowledge. Defines the ACK/NACK generation from the master/slave receiver during the acknowledge cycle.
bit 5
0: A NACK (high level on SDA) is returned during the acknowledge cycle.
1: An ACK (low level on SDA) is returned during the acknowledge cycle.
In slave transmit mode, 0 = Current byte is last byte, 1 = More to follow.
0
Always set this value to zero.
bit 4
FAST
Fast Mode Enable.
bit 3
0: Standard Mode (100kHz)
1: Fast Mode (400kHz)
MSTR
SPI Master Mode.
bit 2
0: Slave Mode
1: Master Mode
SCLS
Clock Stretch.
bit 1
0: No effect
1: Release the clock line. For the slave mode, the clock is stretched for each data transfer. This bit releases the clock.
FILEN
Filter Enable. 50ns glitch filter.
bit 0
0: Filter disabled
1: Filter enabled
SPI Data (SPIDATA) / I2C Data (I2CDATA)
7
6
5
4
3
2
1
0
Reset Value
SFR 9Bh
00h
SPIDATA
SPI Data. Data for SPI is read from or written to this location. The SPI transmit and receive buffers are
bits 70
separate registers, but both are addressed at this location. Read to clear the receive interrupt and write to clear the
transmit interrupt.
I2CDATA
I2C Data . (MSC1211 and MSC1213 only.) Data for I2C is read from or written to this location. The I2C transmit and
receive buffers are separate registers, but both are addressed at this location. Writing to this register
bits 70
starts transmission. In Master mode, reading this register starts a Master read cycle.
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| MSC1211Y2PAGR | 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP64 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MSC1214Y3PAGT | 功能描述:数据转换系统 Prec A/D & D/A w/ 8051 Mcntrl & Flash RoHS:否 制造商:Texas Instruments 转换速率:0.001 MSPs 分辨率:24 bit 最大工作温度:+ 125 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:TQFP-64 封装:Reel |
| MSC1214Y3PAGTG4 | 功能描述:数据转换系统 Prec A/D & D/A with 8051 MCU and FL Mem RoHS:否 制造商:Texas Instruments 转换速率:0.001 MSPs 分辨率:24 bit 最大工作温度:+ 125 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:TQFP-64 封装:Reel |
| MSC1214Y4 | 制造商:TI 制造商全称:Texas Instruments 功能描述:Precision Analog-to-Digital Converter (ADC) and Digital-to-Analog Converters (DACs) with 8051 Microcontroller and Flash Memory |
| MSC1214Y4PAGR | 功能描述:数据转换系统 Prec A/D & D/A w/ 8051 Mcntrl & Flash RoHS:否 制造商:Texas Instruments 转换速率:0.001 MSPs 分辨率:24 bit 最大工作温度:+ 125 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:TQFP-64 封装:Reel |
| MSC1214Y4PAGRG4 | 功能描述:数据转换系统 24B ADC 16B DAC 16kB RoHS:否 制造商:Texas Instruments 转换速率:0.001 MSPs 分辨率:24 bit 最大工作温度:+ 125 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:TQFP-64 封装:Reel |
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