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参数资料
| 型号： | MSM5116165B |
| 厂商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 1M×16 Dynamic RAM(1M×16动态RAM) |
| 中文描述： | 100万× 16动态RAM（100万× 16动态内存） |
| 文件页数： | 8/16页 |
| 文件大小： | 254K |
| 代理商： | MSM5116165B |
8/16
Semiconductor
MSM5116165B
Notes:
1. A start-up delay of 200
μ
s is required after power-up, followed by a minimum of eight
initialization cycles (
RAS
-only refresh or
CAS
before
RAS
refresh) before proper device
operation is achieved.
2. The AC characteristics assume t
T
= 2 ns.
3. V
IH
(Min.) and V
IL
(Max.) are reference levels for measuring input timing signals.
Transition times (t
T
) are measured between V
IH
and V
IL
.
4. This parameter is measured with a load circuit equivalent to 2 TTL loads and 100 pF.
5. Operation within the t
RCD
(Max.) limit ensures that t
RAC
(Max.) can be met.
t
RCD
(Max.) is specified as a reference point only. If t
RCD
is greater than the specified
t
RCD
(Max.) limit, then the access time is controlled by t
CAC
.
6. Operation within the t
RAD
(Max.) limit ensures that t
RAC
(Max.) can be met.
t
RAD
(Max.) is specified as a reference point only. If t
RAD
is greater than the specified
t
RAD
(Max.) limit, then the access time is controlled by t
AA
.
7. t
CEZ
(Max.), t
REZ
(Max.), t
WEZ
(Max.) and t
OEZ
(Max.) define the time at which the
output achieves the open circuit condition and are not referenced to output voltage
levels.
8. t
CEZ
and t
REZ
must be satisfied for open circuit condition.
9. t
RCH
or t
RRH
must be satisfied for a read cycle.
10. t
WCS
, t
CWD
, t
RWD
, t
AWD
and t
CPWD
are not restrictive operating parameters. They are
included in the data sheet as electrical characteristics only. If t
WCS
≥
t
WCS
(Min.), then
the cycle is an early write cycle and the data out will remain open circuit (high
impedance) throughout the entire cycle. If t
CWD
≥
t
CWD
(Min.) , t
RWD
≥
t
RWD
(Min.),
t
AWD
≥
t
AWD
(Min.) and t
CPWD
≥
t
CPWD
(Min.), then the cycle is a read modify write
cycle and data out will contain data read from the selected cell; if neither of the above
sets of conditions is satisfied, then the condition of the data out (at access time) is
indeterminate.
11. These parameters are referenced to the
UCAS
and
LCAS
, leading edges in an early
write cycle, and to the
WE
leading edge in an
OE
control write cycle, or a read modify
write cycle.
12. These parameters are determined by the falling edge of either
UCAS
or
LCAS
,
whichever is earlier.
13. These parameters are determined by the rising edge of either
UCAS
or
LCAS
,
whichever is later.
14. t
CWL
should be satisfied by both
UCAS
and
LCAS
.
15. t
CP
is determined by the time both
UCAS
and
LCAS
are high.
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| MSM5116400F-50SJ | 4,194,304-Word 】 4-Bit DYNAMIC RAM : FAST PAGE MODE TYPE |
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相关代理商/技术参数 |
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| MSM5116165D | 制造商:OKI 制造商全称:OKI electronic componets 功能描述:1,048,576-Word x 16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO |
| MSM5116165DSL | 制造商:OKI 制造商全称:OKI electronic componets 功能描述:1,048,576-Word x 16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO |
| MSM5116400A | 制造商:OKI 制造商全称:OKI electronic componets 功能描述:4,194,304-Word x 4-Bit DYNAMIC RAM : FAST PAGE MODE TYPE |
| MSM5116400B | 制造商:OKI 制造商全称:OKI electronic componets 功能描述:4,194,304-Word x 4-Bit DYNAMIC RAM : FAST PAGE MODE TYPE |
| MSM5116400C | 制造商:OKI 制造商全称:OKI electronic componets 功能描述:4,194,304-Word x 4-Bit DYNAMIC RAM : FAST PAGE MODE TYPE |
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