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参数资料
| 型号： | MSM63182A-XXX |
| 厂商： | LAPIS SEMICONDUCTOR CO LTD |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 4-BIT, MROM, 2 MHz, MICROCONTROLLER, UUC107 |
| 封装： | 4.44 X 4.92 MM, 0.35 MM HEIGHT, DIE-107 |
| 文件页数： | 30/30页 |
| 文件大小： | 228K |
| 代理商： | MSM63182A-XXX |
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FEDL63182A-02
1Semiconductor
MSM63182A
8/29
PIN DESCRIPTIONS
The basic functions of each pin of the MSM63182A are described in Table 1.
A symbol with a slash ( / ) denotes a pin that has a secondary function.
Refer to Table 2 for secondary functions.
For type, “—” denotes a power supply pin, “I” an input pin, “O” an output pin, and “I/O” an input-output pin.
Table 1 Pin Descriptions (Basic Functions)
Function
Symbol
Pin
Pad No.
Type
Description
V
DD
52
66
—
Positive power supply
V
SS
41
55
—
Negative power supply
V
DD1
42
56
V
DD2
43
57
V
DD3
44
58
V
DD4
45
59
V
DD5
46
60
—
Power supply pins for LCD bias (internally generated).
Capacitors (0.1
F) should be connected between these pins
and V
SS.
C1
47
61
—
C2
48
62
—
Capacitor connection pins for LCD bias generation.
A capacitor (0.1
F) should be connected between C1 and C2.
V
DDI
110
6
—
Positive power supply pin for external interface
(power supply for input, output, and input-output ports)
V
DDL
53
67
—
Positive power supply pin for internal logic (internally
generated).
A capacitor (0.1
F) should be connected between this pin and
V
SS.
V
DDH
49
63
—
Voltage multiplier pin for power supply backup (internally
generated).
A capacitor (1.0
F) should be connected between this pin and
V
SS.
CB1
50
64
—
Power
supply
CB2
51
65
—
Pins to connect a capacitor for voltage multiplier.
A capacitor (1.0
F) should be connected between CB1 and
CB2.
XT0
58
72
I
XT1
57
71
O
Low-speed clock oscillation pins.
A 32.768 kHz crystal should be connected between XT0 and
XT1, and C
G (5 to 25 pF) should be connected between XT0
and V
SS.
OSC0
55
69
I
Oscillation
OSC1
54
68
O
High-speed clock oscillation pins.
A ceramic resonator and capacitors (C
L0, CL1) or external
oscillation resistor (R
OS) should be connected to these pins.
TST1
60
74
I
Test
TST2
59
73
I
Input pins for testing.
A pull-down resistor is internally connected to these pins.
The user cannot use these pins.
Reset
RESET
56
70
I
Reset input pin.
Setting this pin to “H” level puts this device into a reset state.
Then, setting this pin to “L” level starts executing an instruction
from address 0000H.
A pull-down resistor is internally connected to this pin.
BD
108
4
O
Buzzer output pin (non-inverted output)
Buzzer
BDB
109
5
O
Buzzer output pin (inverted output)
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