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Contents - 2
(5) Area for Setting Local Registers ..................................................................... 3-11
(6) External Memory Area .................................................................................... 3-11
(7) Common Area ................................................................................................ 3-12
3.1.4
Accessing Data Memory .................................................................................. 3-12
(1) Byte Operation ............................................................................................... 3-12
(2) Word Operation .............................................................................................. 3-13
3.2
Registers .................................................................................................................. 3-14
3.2.1
Arithmetic Register (ACC) ................................................................................ 3-14
3.2.2
Control Registers ............................................................................................. 3-15
(1) Program Status Word (PSW) .......................................................................... 3-15
(2) Program Counter (PC) .................................................................................... 3-19
(3) Local Register Base (LRB) .............................................................................. 3-19
(4) System Stack Pointer (SSP) ........................................................................... 3-20
3.2.3
Pointing Register (PR) ...................................................................................... 3-21
3.2.4
Local Registers (R, ER) .................................................................................... 3-22
3.2.5
Segment Registers ........................................................................................... 3-23
(1) Code Segment Register (CSR) ....................................................................... 3-23
(2) Table Segment Register (TSR) ....................................................................... 3-23
(3) Data Segment Register (DSR) ........................................................................ 3-24
3.3
Addressing Modes ................................................................................................... 3-24
3.3.1
RAM Addressing .............................................................................................. 3-24
(1) Register Addressing ....................................................................................... 3-25
(2) Page Addressing ............................................................................................ 3-27
(3) Direct Data Addressing ................................................................................... 3-30
(4) Pointing Register Indirect Addressing ............................................................ 3-31
(5) Special Bit Area Addressing ........................................................................... 3-38
3.3.2
ROM Addressing .............................................................................................. 3-40
(1) Immediate Addressing .................................................................................... 3-40
(2) Table Data Addressing ................................................................................... 3-40
(3) Program Code Addressing ............................................................................. 3-42
(4) ROM Window Addressing .............................................................................. 3-43
Chapter 4
CPU Control Functions .............................................................................. 4-1
4.1
Standby Function ...................................................................................................... 4-1
4.1.1
Standby Control Register (SBYCON) ................................................................. 4-3
4.1.2
Operation in Standby Modes ............................................................................. 4-4
(1) HALT Mode ....................................................................................................... 4-4
(2) STOP Mode ...................................................................................................... 4-5
4.2
Reset Function ........................................................................................................... 4-6
Chapter 5
Memory Control Functions ....................................................................... 5-1
5.1
ROM Window Function .............................................................................................. 5-1
5.2
READY Function ........................................................................................................ 5-2
5.3
WAIT Function ........................................................................................................... 5-4