参数资料
型号: MSM80C88A-10
厂商: OKI SEMICONDUCTOR CO., LTD.
英文描述: 8-Bit CMOS Microprocessor(内部结构为16位,外围接口8位,8位微处理器)
中文描述: 8位CMOS微处理器(内部结构为16位,外围接口8位,8位微处理器)
文件页数: 7/37页
文件大小: 270K
代理商: MSM80C88A-10
7/37
Semiconductor
MSM80C88A-10RS/GS/JS
Timing Responses
RD
Inactive Delay
RD
Inactive to Next Address Active
HLDA Valid Delay
RD
Width
WR
Width
Address Valid to ALE Low
Ouput Rise Time (From 0.8 V to 2.0 V) t
OLOH
Output Fall Time (From 2.0 V to 0.8 V)
t
CLRH
t
RHAV
t
CLHAV
t
RLRH
t
WLWH
t
AVAL
10
60
60
15
15
ns
ns
ns
ns
ns
ns
ns
ns
t
CLCL
-35
10
2t
CLCL
-40
2t
CLCL
-35
t
CLCH
-35
10
80
100
15
15
t
CLCH
-40
10
2t
CLCL
-50
2t
CLCL
-40
t
CLCH
-40
10
150
160
15
15
t
CLCH
-45
10
2t
CLCL
-75
2t
CLCL
-60
t
CLCH
-60
t
OHOL
Parameter
Symbol
Unit
Max.
60
50
40
45
60
55
50
55
70
Min.
10
10
t
CLAX
t
CLCH
-10
t
CLCH
-10
10
10
t
CLCH
-25
10
10
10
0
10
10 MHz Spec.
V
CC
= 4.75 V to 5.25 V
Ta = 0 to +70°C
Max.
60
50
50
55
60
70
60
70
100
Min.
10
10
t
CLAX
t
CLCH
-10
t
CLCH
-10
t
CLCH
-30
10
10
10
0
10
8 MHz Spec.
V
CC
= 4.75 V to 5.25 V
Ta = 0 to +70°C
Max.
110
80
80
85
110
110
110
110
165
Min.
10
10
t
CLAX
t
CLCH
-20
t
CLCH
-10
10
10
t
CLCH
-30
10
10
10
0
10
5 MHz Spec.
V
CC
= 4.5 V to 5.5 V
Ta = –40 to +85°C
Address Valid Delay
Address Hold Time
Address Float Delay
ALE Width
ALE Active Delay
ALE Inactive Delay
Address Hold Time to ALE Inactive
Data Valid Delay
Data Hold Time
Data Hold Time after
WR
Control Active Delay 1
Control Active Delay 2
Control Inactive Delay
Address Float to
RD
Active
RD
Active Delay
t
CLAV
t
CLAX
t
CLAZ
t
LHLL
t
CLLH
t
CHLL
t
LLAX
t
CLDV
t
CHDX
t
WHDX
t
CVCTV
t
CHCTV
t
CVCTX
t
AZRL
t
CLRL
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes: 1. Signals at MSM82C84A-2 shown for reference only.
2. Setup requirement for asynchronous signal only to guarantee recognition at next
CLK.
3. Applies only to T
2
state. (8 ns into T
3
)
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