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参数资料
| 型号： | MSP430C325IPM |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, OTPROM, 3.3 MHz, RISC MICROCONTROLLER, PQFP64 |
| 封装： | QFP-64 |
| 文件页数： | 30/35页 |
| 文件大小： | 511K |
| 代理商： | MSP430C325IPM |
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MSP430C32x, MSP430P325A
MIXED SIGNAL MICROCONTROLLER
SLAS219B MARCH 1999 REVISED MARCH 2000
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
short-form description
processing unit
The processing unit is based on a consistent and orthogonally-designed CPU and instruction set. This design
structure results in a RISC-like architecture, highly transparent to the application development and is
distinguished due to ease of programming. All operations other than program-flow instructions are
consequently performed as register operations in conjunction with seven addressing modes for source and four
modes for destination operand.
CPU
Sixteen registers are located inside the CPU,
providing reduced instruction execution time. This
reduces a register-register operation execution
time to one cycle of the processor frequency.
Four of the registers are reserved for special
use as a program counter, a stack pointer, a status
register and a constant generator. The remaining
registers
are
available
as
general-purpose
registers.
Peripherals are connected to the CPU using a
data address and control bus and can be handled
easily
with
all
instructions
for
memory
manipulation.
instruction set
The instruction set for this register-register architecture provides a powerful and easy-to-use assembler
language. The instruction set consists of 51 instructions with three formats and seven addressing modes.
Table 1 provides a summation and example of the three types of instruction formats; the addressing modes are
listed in Table 2.
Table 1. Instruction Word Formats
Dual operands, source-destination
e.g. ADD
R4, R5
R4 + R5
→ R5
Single operands, destination only
e.g. CALL R8
PC
→ (TOS), R8 → PC
Relative jump, un-/conditional
e.g. JNE
Jump-on equal bit = 0
Each instruction that operates on word and byte data is identified by the suffix B.
Examples:
Instructions for word operation
Instructions for byte operation
MOV
EDE, TONI
MOV.B
EDE, TONI
ADD
#235h, &MEM
ADD.B
#35h, &MEM
PUSH
R5
PUSH.B
R5
SWPB
R5
—
Program Counter
General-Purpose Register
PC/R0
Stack Pointer
SP/R1
Status Register
SR/CG1/R2
Constant Generator
CG2/R3
R4
General-Purpose Register
R5
General-Purpose Register
R14
General-Purpose Register
R15
相关PDF资料 |
PDF描述 |
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| MSP50C37N | 0-BIT, 19.7 MHz, MIXED DSP, PDIP16 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MSP430C32X | 制造商:TI 制造商全称:Texas Instruments 功能描述:MIXED SIGNAL MICROCONTROLLER |
| MSP430C32XPG | 制造商:TI 制造商全称:Texas Instruments 功能描述:MIXED SIGNAL MICROCONTROLLER |
| MSP430C336 | 制造商:TI 制造商全称:Texas Instruments 功能描述:MIXED SIGNAL MICROCONTROLLERS |
| MSP430C336HFD | 制造商:TI 制造商全称:Texas Instruments 功能描述:MIXED SIGNAL MICROCONTROLLERS |
| MSP430C336IPJM | 制造商:TI 制造商全称:Texas Instruments 功能描述:MIXED SIGNAL MICROCONTROLLERS |
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