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| 型号： | MSP430C412IRTD |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, MROM, 8 MHz, RISC MICROCONTROLLER, PQCC64 |
| 封装： | PLASTIC, QFN-64 |
| 文件页数： | 21/58页 |
| 文件大小： | 1160K |
| 代理商： | MSP430C412IRTD |
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MSP430x41x
MIXED SIGNAL MICROCONTROLLER
SLAS340H MAY 2001 REVISED APRIL 2007
28
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted) (continued)
Comparator_A (see Note 1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
I
CAON
1 CARSEL
0 CAREF
0
VCC = 2.2 V
25
40
A
I(CC)
CAON = 1, CARSEL = 0, CAREF = 0
VCC = 3 V
45
60
μA
I
CAON = 1, CARSEL = 0,
CAREF
1/2/3
VCC = 2.2 V
30
50
A
I(Refladder/RefDiode)
CAREF = 1/2/3,
No load at P1.6/CA0 and P1.7/CA1
VCC = 3 V
45
71
μA
V(Ref025)
Voltage @ 0.25 V
CC node
V
CC
PCA0 = 1, CARSEL = 1, CAREF = 1,
No load at P1.6/CA0 and P1.7/CA1
VCC = 2.2 V / 3 V
0.23
0.24
0.25
V(Ref050)
Voltage @ 0.5 V
CC node
V
CC
PCA0 = 1, CARSEL = 1, CAREF = 2,
No load at P1.6/CA0 and P1.7/CA1
VCC = 2.2V / 3 V
0.47
0.48
0.50
V
(see Figure 10 and
PCA0 = 1, CARSEL = 1, CAREF = 3,
No load at P1 6/CA0 and P1 7/CA1;
VCC = 2.2 V
390
480
540
mV
V(RefVT)
(see Figure 10 and
No load at P1.6/CA0 and P1.7/CA1;
TA = 85°C
VCC = 3.0 V
400
490
550
mV
V(IC)
Common-mode input
voltage range
CAON = 1
VCC = 2. 2V/3 V
0
VCC1.0
V
V(offset)
Offset voltage
See Note 2
VCC = 2.2 V/3 V
30
mV
Vhys
Input hysteresis
CAON = 1
VCC = 2.2 V / 3 V
0
0.7
1.4
mV
TA = 25°C,
VCC = 2.2 V
160
210
300
ns
t
TA = 25 C,
Overdrive 10 mV, without filter: CAF = 0
VCC = 3 V
80
150
240
ns
t(response LH)
TA = 25°C
VCC = 2.2 V
1.4
1.9
3.4
s
TA = 25 C
Overdrive 10 mV, with filter: CAF = 1
VCC = 3 V
0.9
1.5
2.6
μs
TA = 25°C
VCC = 2.2 V
130
210
300
ns
t
TA = 25 C
Overdrive 10 mV, without filter: CAF = 0
VCC = 3 V
80
150
240
ns
t(response HL)
TA = 25°C,
VCC = 2.2 V
1.4
1.9
3.4
s
TA = 25 C,
Overdrive 10 mV, with filter: CAF = 1
VCC = 3.0 V
0.9
1.5
2.6
μs
NOTES:
1. The leakage current for the Comparator_A terminals is identical to Ilkg(Px.x) specification.
2. The input offset voltage can be cancelled by using the CAEX bit to invert the Comparator_A inputs on successive measurements.
The two successive measurements are then summed together.
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